Method of forming self-aligned silicide in integra

专利名称：Method of forming self-aligned silicide in

integrated circuit without causing bridgingeffects

发明人：Der-Yuan Wu申请号：US09/1396申请日：19980817公开号：US060962A公开日：20000801

摘要：A method is provided for forming self-aligned silicide in integrated circuit, whichcan help prevent the occurrence of a bridging effect in the integrated circuit. This methodis characterized in the provision of an elevated spacer structure that can act like a barrierto prevent the occurrence of a bridging effect between the polysilicon gate and thesource/drain regions caused by the forming of undesired silicide over the spacerstructure due to lateral diffusion of the silicide from the polysilicon gate. Moreover, thismethod is characterized in the use of two different materials to respectively form thesacrificial layer and the field oxide layers, thus allowing the field oxide layers to remainsubstantially intact during the removal of the sacrificial layer through etching. Thisfeature can help prevent the occurrence of leakage current from the metal plug to thesubstrate.

申请人：UNITED MICROELECTRONICS CORP.

代理机构：Thomas, Kayden, Horstemeyer & Risley

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