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MB90F867EPFV资料

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FUJITSU SEMICONDUCTOR

DATA SHEET

DS07-13748-1E

16-bit Proprietary Microcontroller

CMOS

F2MC-16LX MB90860E Series

MB90867E(S), MB90F867E(S), MB90V340E-101/102

■DESCRIPTION

MB90860E-series with Flash ROM is especially designed for automotive and other industrial applications. Withthe new 0.35 µm CMOS technology, Fujitsu now offers on-chip Flash ROM program memory up to 512 Kbytes. The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates amajor advantage in terms of EMI and power consumption.

The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock.

The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit freerunning timers. 4 UARTs constitute additional functionality for communication purposes. Note : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.

Be sure to refer to the “Check Sheet” for the latest cautions on development.

“Check Sheet” is seen at the following support page

URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html

“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system development.

Copyright©2006 FUJITSU LIMITED All rights reserved

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MB90860E Series

■FEATURES

• CPU

•Instruction system best suited to controller

•Wide choice of data types (bit, byte, word, and long word)•Wide choice of addressing modes(23 types)

•Enhanced multiply-divide instructions and RETI instructions•Enhanced high-precision computing with 32-bit accumulator

•Instruction system compatible with high-level language (C language) and multitask•Employing system stack pointer

•Enhanced various pointer indirect instructions•Barrel shift instructions

•Increased processing speed•4-byte instruction queue• Serial interface

•UART (LIN/SCI) : up to 4 channels•Equipped with full-duplex double buffer

•Clock-asynchronous or clock-synchronous serial transmission is available•I2C interface* : up to 2 channels•Up to 400 Kbits/s transfer rate• Interrupt controller

•Powerful interrupt function

•Powerful 8-level, 34-condition interrupt feature•Up to 16 external interrupts are supported

•Automatic data transfer function independent of CPU

•Expanded intelligent I/O service function (EI2OS) : up to 16 channels• I/O port

•General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix)

• 8/10-bit A/D converter

•8/10-bit A/D converter : 24 channels

•Resolution is selectable between 8-bit and 10-bit.•Activation by external trigger input is allowed.

•Conversion time : 3 µs (at 24-MHz machine clock, including sampling time)•Program patch function• Timer

•Time-base timer, clock timer, watchdog timer : 1 channel

•8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels•16-bit reload timer : 4 channels•16-bit input/output timer

- 16-bit free run timer : 2 channel

(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)- 16-bit input capture: (ICU) : 8 channels- 16-bit output compare : (OCU) : 8 channels

2

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MB90860E Series

• Variety of mode

•Low power consumption (standby) mode

•Sleep mode (a mode that halts CPU operating clock)

•Main timer mode (time-base timer mode that is transferred from main clock mode)•PLL timer mode (time-base timer mode that is transferred from PLL clock mode)•Watch mode (a mode that operates sub clock and clock timer only)•Stop mode (a mode that stops oscillation clock and sub clock)•CPU blocking operation mode• Technology

•0.35 µm CMOS technology

* : I2C license :

Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these com-ponents in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips.

3

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MB90860E Series

■PRODUCT LINEUP

Part Number

MB90867E(S)

ParameterCPUTypeSystem clockROMRAM

Emulator-specific power supply*1

MASK ROM product

F2MC-16LX CPUFlash memory product

Evaluation product

On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)

MASK ROM128 Kbytes6 Kbytes

Flash memory128 Kbytes6 Kbytes

External30 KbytesYes

MB90F867E(S)

MB90V340E-101/102

Technology

0.35 µm CMOS with on-chip

0.35 µm CMOS with on-chip voltage regulator for internal 0.35 µm CMOS with on-chip voltage regulator for internal power supply + Flash memory voltage regulator for internal power supplywith on-chip charge pump for power supply

programming voltage3.5 V to 5.5 V : at normal operating (not using A/D converter)4.0 V to 5.5 V : at using A/D converter/Flash programming4.5 V to 5.5 V : at using external bus

−40 °C to +105 °CQFP-100, LQFP-100

4 channels

5 V ± 10%

⎯PGA-2995 channels

Operating voltage rangeTemperature rangePackageUARTI2C (400 kbps) 8/10-bit

A/D converter16-bit reload timer (4 channels) 16-bit I/O timer

(2 channels) 16-bit output compare (8 channels)16-bit input capture(8 channels)

Wide range of baud rate settings using a dedicated reload timer

Special synchronous options for adapting to different synchronous serial protocolsLIN functionality working either as master or slave LIN device

2 channels24 channels

10-bit or 8-bit resolution

Conversion time : Min 3 µs include sample time (per one channel)

Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency) Supports External Event Count function

Signals an interrupt when overflowing

Supports Timer Clear when a match with Output Compare (ch.0, ch.4)

Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27(fsys = Machine clock freq.)

I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7Signals an interrupt when 16-bit I/O Timer match output compare registers.A pair of compare registers can be used to generate an output signal.Rising edge, falling edge or rising & falling edge sensitiveSignals an interrupt upon external event

(Continued)

4

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MB90860E Series

(Continued)

Part Number

MB90867E(S)

Parameter

Supports 8-bit and 16-bit operation modesSixteen 8-bit reload counters

8/16-bit Sixteen 8-bit reload registers for L pulse widthprogrammable pulse Sixteen 8-bit reload registers for H pulse widthgeneratorA pair of 8-bit reload counters can be configured as one 16-bit reload counter or as (8 channels) 8-bit prescaler plus 8-bit reload counter

Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz (fsys = Machine clock frequency, fosc = Oscillation clock frequency) CAN interfaceExternal interrupt (16 channels) D/A converterUp to 100 kHz sub clock for low power operation

Devices without ‘S’-suffix

3 channels

Can be used rising edge, falling edge, starting up by H/L level input, external interrupt, expanded intelligent I/O services (EI2OS) and DMA

2 channelsOnly for MB90V340E-102

MB90F867E(S)

MB90V340E-101/102

I/O ports

Virtually all external pins can be used as general purpose I/O portAll push-pull outputs

Bit-wise settable as input/output or peripheral signal

Settable in pin-wise of 8 as CMOS schmitt trigger/automotive inputs (default) TTL input level settable for external bus (32-pin only for external bus)Supports automatic programming, Embedded AlgorithmTM*2Write/Erase/Erase-Suspend/Resume commandsA flag indicating completion of the algorithmNumber of erase cycles : 10,000 timesData retention time : 20 yearsBoot block configuration

Erase can be performed on each block

Block protection with external programming voltage

Flash Security Feature for protecting the content of the Flash

Flash memory

*1 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.

Please refer to the Emulator hardware manual about details.*2 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.

5

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MB90860E Series

■PIN ASSIGNMENTS

•MB90V340E-101/102 (TOP VIEW)P04/AD04/INT12P05/AD05/INT13P06/AD06/INT14P07/AD07/INT15P10/AD08/TIN1P11/AD09/TOT1P12/AD10/SIN3/INT11RP13/AD11/SOT3P14/AD12/SCK3VccVssX1X0P15/AD13/SIN4P16/AD14/SOT4P17/AD15/SCK4P20/A16/PPG9(8)P21/A17/PPGB(A)P22/A18/PPGD(C)P23/A19/PPGF(E)807978777675747372717069686766656362616059585756555352515081824983488447868587448843429041QFP - 1009140923993343795369635973498339932100311234567101112131415161718192021222324252627282930P24/A20/IN0P25/A21/IN1P26/A22/IN2P27/A23/IN3P30/ALE/IN4P31/RD/IN5P32/WRL/WR/RX2/INT10RP33/WRH/TX2P34/HRQ/OUT4P35/HAK/OUT5P36/RDY/OUT6P37/CLK/OUT7P40/X0A* P41/X1A* VccVssCP42/IN6/RX1/INT9RP43/IN7/TX1P44/SDA0/FRCK0P45/SCL0/FRCK1P46/SDA1P47/SCL1P50/AN8/SIN2P51/AN9/SOT2P52/AN10/SCK2P53/AN11/TIN3P/AN12/TOT3P55/AN13P56/AN14/DA00P03/AD03/INT11P02/AD02/INT10P01/AD01/INT9P00/AD00/INT8PA1/TX0PA0/RX0/INT8RP97/OUT3P96/OUT2P95/OUT1P94/OUT0P93/PPG7(6)P92/PPG5(4)P91/PPG3(2)P90/PPG1(0)VssVccP87/SCK1P86/SOT1P85/SIN1P84/SCK0/INT15RP83/SOT0/TOT2P82/SIN0/TIN2/INT14RP81/TOT0/CKOT/INT13RP80/TIN0/ADTG/INT12RP77/AN23/INT7P76/AN22/INT6RS0MD1MD2P75/AN21/INT5P74/AN20/INT4P73/AN19/INT3P72/AN18/INT2P71/AN17/INT1P70/AN16/INT0VssP67/AN7/PPGE(F)P66/AN6/PPGC(D)P65/AN5/PPGA(B)P/AN4/PPG8(9)P63/AN3/PPG6(7)P62/AN2/PPG4(5)P61/AN1/PPG2(3)P60/AN0/PPG0(1)AVssAVRLAVRHAVccP57/AN15/DA01 (FPT-100P-M06) * : X0A, X1A : MB90V340E-102P40, P41 : MB90V340E-101(Continued)6

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MB90860E Series

(Continued)(TOP VIEW)P81/TOT0/CKOT/INT13RP80/TIN0/ADTG/INT12RP77/AN23/INT7P76/AN22/INT6P00/AD00/INT8PA1/TX0PA0/RX0/INT8RP97/OUT3P96/OUT2P95/OUT1P94/OUT0P93/PPG7(6)P92/PPG5(4)P91/PPG3(2)P90/PPG1(0)VssVccP87/SCK1P86/SOT1P85/SIN1P84/SCK0/INT15RP83/SOT0/TOT2P82/SIN0/TIN2/INT14RP01/AD01/INT9P02/AD02/INT10P03/AD03/INT11P04/AD04/INT12P05/AD05/INT13P06/AD06/INT14P07/AD07/INT15P10/AD08/TIN1P11/AD09/TOT1P12/AD10/SIN3/INT11RP13/AD11/SOT3P14/AD12/SCK3VccVssX1X0P15/AD13/SIN4P16/AD14/SOT4P17/AD15/SCK4P20/A16/PPG9(8)P21/A17/PPGB(A)P22/A18/PPGD(C)P23/A19/PPGF(E)P24/A20/IN0P25/A21/IN1757473727170696867666563626160595857565553525176507749784847794680458144824383428441808639873888LQFP - 100373690359134923393329431953096299798292710026123456710111213141516171819202122232425P36/RDY/OUT6P37/CLK/OUT7P40/X0A* P41/X1A* P26/A22/IN2P27/A23/IN3P30/ALE/IN4P31/RD/IN5P32/WRL/WR/RX2/INT10RP33/WRH/TX2P34/HRQ/OUT4P42/IN6/RX1/INT9RP43/IN7/TX1P44/SDA0/FRCK0P45/SCL0/FRCK1P46/SDA1P47/SCL1P50/AN8/SIN2P51/AN9/SOT2P52/AN10/SCK2P53/AN11/TIN3P35/HAK/OUT5VccVssCRS0MD1MD2P75/AN21/INT5P74/AN20/INT4P73/AN19/INT3P72/AN18/INT2P71/AN17/INT1P70/AN16/INT0VssP67/AN7/PPGE(F)P66/AN6/PPGC(D)P65/AN5/PPGA(B)P/AN4/PPG8(9)P63/AN3/PPG6(7)P62/AN2/PPG4(5)P61/AN1/PPG2(3)P60/AN0/PPG0(1)AVssAVRLAVRHAVccP57/AN15/DA01P56/AN14/DA00P55/AN13P/AN12/TOT3 (FPT-100P-M05) * : X0A, X1A : MB90V340E-102P40, P41 : MB90V340E-1017

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MB90860E Series

•MB90867E(S)/MB90F867E(S)(TOP VIEW) P03/AD03/INT11P02/AD02/INT10P01/AD01/INT9P00/AD00/INT8PA1PA0/INT8RP97/OUT3P96/OUT2P95/OUT1P94/OUT0P93/PPG7(6)P92/PPG5(4)P91/PPG3(2)P90/PPG1(0)VssVccP87/SCK1P86/SOT1P85/SIN1P84/SCK0/INT15RP83/SOT0/TOT2P82/SIN0/TIN2/INT14RP81/TOT0/CKOT/INT13RP80/TIN0/ADTG/INT12RP77/AN23/INT7P76/AN22/INT6MD0MD1P04/AD04/INT12P05/AD05/INT13P06/AD06/INT14P07/AD07/INT15P10/AD08/TIN1P11/AD09/TOT1P12/AD10/SIN3/INT11RP13/AD11/SOT3P14/AD12/SCK3VccVssX1X0P15/AD13P16/AD14P17/AD15P20/A16/PPG9(8)P21/A17/PPGB(A)P22/A18/PPGD(C)P23/A19/PPGF(E)80797877767574737271706968676665636261605958575655535251508182498348844786858744884342QFP - 10090419140923993343795369635973498339932100311234567101112131415161718192021222324252627282930P31/RD/IN5P32/WRL/WR/INT10RP35/HAK/OUT5P36/RDY/OUT6P37/CLK/OUT7P40/X0A* P41/X1A* VccVssCP42/IN6/INT9RP43/IN7P44/SDA0/FRCK0P45/SCL0/FRCK1P46/SDA1P47/SCL1P50/AN8/SIN2P51/AN9/SOT2P52/AN10/SCK2P53/AN11/TIN3P/AN12/TOT3P55/AN13P56/AN14P33/WRHP34/HRQ/OUT4P24/A20/IN0P25/A21/IN1P26/A22/IN2P27/A23/IN3P30/ALE/IN4MD2RSTP75/AN21/INT5P74/AN20/INT4P73/AN19/INT3P72/AN18/INT2P71/AN17/INT1P70/AN16/INT0VssP67/AN7/PPGE(F)P66/AN6/PPGC(D)P65/AN5/PPGA(B)P/AN4/PPG8(9)P63/AN3/PPG6(7)P62/AN2/PPG4(5)P61/AN1/PPG2(3)P60/AN0/PPG0(1)AVssAVRLAVRHAVccP57/AN15 (FPT-100P-M06) * : X0A, X1A : MB90867E, MB90F867EP40, P41 : MB90867ES/MB90F867ES(Continued)8

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MB90860E Series

(Continued)(TOP VIEW)P81/TOT0/CKOT/INT13RP80/TIN0/ADTG/INT12RP77/AN23/INT7P76/AN22/INT6P00/AD00/INT8PA1PA0/INT8RP97/OUT3P96/OUT2P95/OUT1P94/OUT0P93/PPG7(6)P92/PPG5(4)P91/PPG3(2)P90/PPG1(0)VssVccP87/SCK1P86/SOT1P85/SIN1P84/SCK0/INT15RP83/SOT0/TOT2P82/SIN0/TIN2/INT14RP01/AD01/INT9P02/AD02/INT10P03/AD03/INT11P04/AD04/INT12P05/AD05/INT13P06/AD06/INT14P07/AD07/INT15P10/AD08/TIN1P11/AD09/TOT1P12/AD10/SIN3/INT11RP13/AD11/SOT3P14/AD12/SCK3VccVssX1X0P15/AD13P16/AD14P17/AD15P20/A16/PPG9(8)P21/A17/PPGB(A)P22/A18/PPGD(C)P23/A19/PPGF(E)P24/A20/IN0P25/A21/IN175747372717069686766656362616059585756555352517650774948784779468045814482438342844180863987LQFP - 1003888373690359134923393329431953096299798292710026123456710111213141516171819202122232425P31/RD/IN5P32/WRL/WR/INT10RP33/WRHP34/HRQ/OUT4P35/HAK/OUT5P36/RDY/OUT6P37/CLK/OUT7P40/X0A*P41/X1A*VccVssCP42/IN6/INT9RP43/IN7P44/SDA0/FRCK0P45/SCL0/FRCK1P46/SDA1P47/SCL1P50/AN8/SIN2P51/AN9/SOT2P52/AN10/SCK2P53/AN11/TIN3P26/A22/IN2P27/A23/IN3P30/ALE/IN4MD0RS1MD2P75/AN21/INT5P74/AN20/INT4P73/AN19/INT3P72/AN18/INT2P71/AN17/INT1P70/AN16/INT0VssP67/AN7/PPGE(F)P66/AN6/PPGC(D)P65/AN5/PPGA(B)P/AN4/PPG8(9)P63/AN3/PPG6(7)P62/AN2/PPG4(5)P61/AN1/PPG2(3)P60/AN0/PPG0(1)AVssAVRLAVRHAVccP57/AN15P56/AN14P55/AN13P/AN12/TOT3 (FPT-100P-M05) * : X0A, X1A : P40, P41 : MB90867E, MB90F867EMB90867ES, MB90F867ES9

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MB90860E Series

■PIN DESCRIPTION

Pin No.

QFP100*1LQFP100*2

Pin name

I/OCircuit type*3

Function

General purpose I/O pins. The register can be set to select

whether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when the corresponding bit in the external address output control register (HACR) is 1.Output pins of the external address bus. When the corresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A20 to A23).Trigger input pins for input captures 0 to 3.

General purpose I/O pin.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.

Address latch enable output pin. This function is enabled when the external bus is enabled.Trigger input pin for input capture 4.

General purpose I/O pin.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.

External read strobe output pin. This function is enabled when the external bus is enabled.

Trigger input pin for input capture 5.

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the WR/WRL pin output disabled.G

WR / WRLWrite strobe output pin for the external data bus. This function is enabled when both the external bus and the WR/WRL pin output are enabled. WRL is used to write-strobe 8 lower bits of the data bus in 16-bit access while WR is used to write-strobe 8 bits of the data bus in 8-bit access.

External interrupt request input pin (sub) .

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled either in single-chip mode or with the WRH pin output disabled.G

WRHWrite strobe output pin for the 8 higher bits of the external data bus. This function is enabled when the external bus is enabled, when the external bus 16-bit mode is selected, and when the WRH output pin is enabled.(Continued)

P24 to P27

1 to 4

99 to 2

A20 to A23IN0 to IN3P30

5

3

ALEIN4P31

6

4

RDIN5P32

GGG

75

INT10RP33

8

6

10

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MB90860E Series

Pin No.

QFP100*1LQFP100*2

Pin name

I/OCircuit type*3

Function

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the hold function disabled.Hold request input pin. This function is enabled when both the external bus and the hold function are enabled.Waveform output pin for output compare 4.

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the hold function disabled.Hold acknowledge output pin. This function is enabled when both the external bus and the hold function are enabled.Waveform output pin for output compare 5.

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the external ready function disabled.External ready input pin. This function is enabled when both the external bus and the external ready function are enabled.Waveform output pin for output compare 6.

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the clock output disabled.Clock output pin. This function is enabled when both the external bus and clock output are enabled.Waveform output pin for output compare 7.General purpose I/O pins.(devices with S-suffix)Input pins for sub-clock (devices without S-suffix)Power (3.5 V to 5.5 V) input pinGND pin

This is the power supply stabilization capacitor pin. It should be connected to a higher than or equal to 0.1 µF ceramic capacitor.

General purpose I/O pin.

Trigger input pin for input capture 6.External interrupt request input pin (sub)

(Continued)

P34

9

7

HRQOUT4P35

10

8

HAKOUT5P36

11

9

RDYOUT6P37

12

10

CLKOUT7P40, P41

13, 14

11, 12

X0A , X1A

151617

131415

VCCVSSCP42

18

16

IN6INT9R

FB⎯⎯KFGGGG

11

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MB90860E Series

Pin No.

QFP100*1LQFP100*2

19

17

Pin nameP43IN7P44

20

18

SDA0FRCK0P45

21

19

SCL0FRCK1

2223

2021

P46SDA1P47SCL1P50

24

22

AN8SIN2P51

25

23

AN9SOT2P52

26

24

AN10SCK2P53

27

25

AN11TIN3P

28

26

AN12TOT3

2930, 3132

2728, 2930

P55AN13P56, P57AN14, AN15

AVCC

I/OCircuit type*3

F

General purpose I/O pin.

Function

Trigger input pin for input capture 7.General purpose I/O pin.Serial data I/O pin for I2C 0Input pin for the 16-bit I/O Timer 0General purpose I/O pin.

H

HSerial clock I/O pin for I2C 0Input pin for the 16-bit I/O TimerGeneral purpose I/O pin.Serial data I/O pin for I2C 1General purpose I/O pin.Serial clock I/O pin for I2C 1General purpose I/O pin.

Analog input pin for the A/D converterSerial data input pin for UART2General purpose I/O pin.

HH

O

IAnalog input pin for the A/D converterSerial data output pin for UART2General purpose I/O pin.

IAnalog input pin for the A/D converterClock I/O pin for UART2General purpose I/O pin.

IAnalog input pin for the A/D converterEvent input pin for the reload timer 3General purpose I/O pin.

IAnalog input pin for the A/D converterOutput pin for the reload timer 3General purpose I/O pin.

Analog input pin for the A/D converterGeneral purpose I/O pins.

Analog input pin for the A/D converterPower input pin for the A/D Converter analog

(Continued)

IJK

12

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MB90860E Series

Pin No.

QFP100*1LQFP100*2

333435

313233

Pin name

I/OCircuit type*3

LKK

Function

Reference voltage input pin for the A/D Converter. This power supply must be turned on or off while a voltage higher than or equal to AVRH is applied to AVCC.

Lower reference voltage input pin for the A/D ConverterGND pin for the A/D Converter analogGeneral purpose I/O pins.

Analog input pins for the A/D converterOutput pins for PPGs

AVRHAVRLAVSSP60 to P67AN0 to AN7PPG0, 2, 4, 6, 8, A, C, E

VSSP70 to P75AN16 to AN21INT0 to INT5

MD2MD1, MD0RSTP76, P77AN22, AN23INT6, INT7

P80TIN0ADTGINT12RP81TOT0CKOTINT13RP82SIN0TIN2INT14RP83

36 to 4334 to 41I

4445 to 505152, 5355, 56

4243 to 484950, 515253,

⎯IDCEI

GND pin

General purpose I/O pins.

Analog input pins for the A/D converterExternal interrupt request input pinsInput pin for specifying the operating mode.Input pins for specifying the operating mode.Reset input

General purpose I/O pins.

Analog input pins for the A/D converterExternal interrupt request input pinsGeneral purpose I/O pin.

Event input pin for the reload timer 0Trigger input pin for the A/D converterExternal interrupt request input pin (sub) General purpose I/O pin.Output pin for the reload timer 0Output pin for the clock monitor

External interrupt request input pin (sub) General purpose I/O pin.Serial data input pin for UART0Event input pin for the reload timer 2External interrupt request input pin (sub) General purpose I/O pin.

5755F

5856F

5957M

6058SOT0TOT2P84

FSerial data output pin for UART0Output pin for the reload timer 2General purpose I/O pin.

6159SCK0INT15R

FClock I/O pin for UART0

External interrupt request input pin (sub)

(Continued)

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MB90860E Series

Pin No.

QFP100*1LQFP100*2

6263656667 to 70

6061626365 to 68

Pin nameP85SIN1P86SOT1P87SCK1VCCVSSP90 to P93PPG1, 3, 5, 7P94 to P97

71 to 74

69 to 72

OUT0 to OUT3PA0INT8RPA1P00 to P07

77 to 84

75 to 82

AD00 to AD07INT8 to INT15

P10

85

83

AD08TIN1P11

86

84

AD09TOT1

I/OCircuit type*3

MFF⎯⎯F

General purpose I/O pin.

Function

Serial data input pin for UART1General purpose I/O pin.Serial data output pin for UART1General purpose I/O pin.Clock I/O pin for UART1Power (3.5 V to 5.5 V) input pinsGND pins

General purpose I/O pinOutput pins for PPGsGeneral purpose I/O pin

Waveform output pins for output compares 0 to 3. This function is enabled when the OCU enables waveform output.General purpose I/O pin.

External interrupt request input pin (sub) General purpose I/O pin.

General purpose I/O pins. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pins for 8 lower bits of the external address/data bus. This function is enabled when the external bus is enabled.External interrupt request input pins.

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.Event input pin for the reload timer 1

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.Output pin for the reload timer 1

(Continued)

F

7576

7374

FF

G

G

G

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MB90860E Series

Pin No.

QFP100*1LQFP100*2

Pin name

I/OCircuit type*3

Function

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

P12

87

85

AD10SIN3INT11RP13

88

86

AD11SOT3P14

87

AD12SCK3

90919293

8091

VCCVSSX1X0P15

94

92

AD13P16

95

93

AD14P17

96

94

AD15

GGG⎯⎯AGGN

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.Serial data input pin for UART3

External interrupt request input pin (sub)

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.Serial data output pin for UART3

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.Clock I/O pin for UART3Power (3.5 V to 5.5 V) input pinGND pin

Main clock output pinMain clock input pin

General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.

I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.

(Continued)

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MB90860E Series

(Continued)

Pin No.QFP100*1LQFP100*2

Pin name

I/OCircuit type*3

Function

General purpose I/O pins. The register can be set to select whether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when the

corresponding bit in the external address output control register (HACR) is 1.

P20 to P23

97 to 10095 to 98

A16 to A19PPG9,PPGB,PPGD,PPGF

G

Output pins of the external address bus. When the

corresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A16 to A19).Output pins for PPGs

*1 : FPT-100P-M06*2 : FPT-100P-M05

*3 : For the I/O circuit type, refer to “■ I/O CIRCUIT TYPE”.

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MB90860E Series

■I/O CIRCUIT TYPE

TypeCircuitRemarks•Oscillation circuitHigh-speed oscillation feedback resistor = approx. 1 MΩX1XoutAX0Standby control signalX1AXout•Oscillation circuitLow-speed oscillation feedback resistor = approx. 10 MΩBX0AStandby control signalCRHysteresisinputs•Mask ROM and evaluation device:CMOS Hysteresis input pin•Flash device:CMOS input pin•Mask ROM and evaluation device:CMOS Hysteresis input pinPull-down resistor value: approx. 50 kΩ•Flash memory device:CMOS input pinNo Pull-downRHysteresisinputsDPull-downResistorCMOS Hysteresis input pinPull-up resistor value: approx. 50 kΩEPull-upResistorRHysteresisinputs(Continued)

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MB90860E Series

TypeCircuitRemarks•CMOS level output (IOL = 4 mA, IOH = −4 mA)•CMOS hysteresis inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)P-chPoutN-chNoutFRHysteresis inputsAutomotive inputsStandby control forinput shutdownPull-up controlP-chP-chPoutN-chNoutGRHysteresis inputs•CMOS level output (IOL = 4 mA, IOH = −4 mA)•CMOS hysteresis inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)•TTL input (With the standby-time inputshutdown function)•Programmable pull-up resistor: 50 kΩ approx.Automotive inputsTTL inputStandby control forinput shutdownP-chPoutN-chNout•CMOS level output (IOL = 3 mA, IOH = −3 mA)•CMOS hysteresis inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)HRHysteresis inputsAutomotive inputsStandby control forinput shutdown(Continued)18

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MB90860E Series

TypeCircuitRemarks•CMOS level output (IOL = 4 mA, IOH = −4 mA)•CMOS hysteresis inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time in-put shutdown function)•A/D converter analog input P-chPoutN-chRNoutIHysteresis inputsAutomotive inputsStandby control forinput shutdownAnalog inputP-chPoutN-chRNout•CMOS level output (IOL = 4 mA, IOH = −4 mA)•D/A analog output•CMOS hysteresis inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time in-put shutdown function)•A/D converter analog input JHysteresis inputsAutomotive inputsStandby control forinput shutdownAnalog inputAnalog outputPower supply input protection circuitP-chKN-chP-chANEAVRLN-ch•A/D converter reference voltage powersupply input pin, with the protection circuit•Flash devices do not have a protection circuit against VCC for pin AVRHANE(Continued)19

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MB90860E Series

(Continued)TypeCircuitRemarks•CMOS level output (IOL = 4 mA, IOH = −4 mA)•CMOS inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)P-chPoutN-chNoutMRCMOS inputsAutomotive inputsStandby control forinput shutdownPull-up controlP-chP-chPoutN-chNoutNRCMOS inputs•CMOS level output (IOL = 4 mA, IOH = −4 mA)•CMOS inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)•TTL input (With the standby-time inputshutdown function)Programmable pull-up registor:50 kΩ approxAutomotive inputsTTL inputStandby control forinput shutdownP-chPoutN-chRNout•CMOS level output(IOL = 4 mA, IOH = −4 mA)•CMOS inputs (With the standby-time input shutdown function)•Automotive input (With the standby-time input shutdown function)•A/D converter analog input OCMOS inputsAutomotive inputsStandby control forinput shutdownAnalog input20

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MB90860E Series

■HANDLING DEVICES

1.Preventing latch-up

CMOS IC may suffer latch-up under the following conditions :

•A voltage higher than VCC or lower than VSS is applied to an input or output pin.•A voltage higher than the rated voltage is applied between VCC and VSS pins.•The AVCC power supply is applied before the VCC voltage.

Latch-up may increase the power supply current drastically, causing thermal damage to the device.

For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digitalpower-supply voltage.

2.Handling unused pins

Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of thedevice. Therefore they must be pulled up or pulled down through resistors. In this case those resistors shouldbe more than 2 kΩ .

Unused bidirectional pins should be set to the output state and can be left open, or the input state with the abovedescribed connection.

3.Power supply pins (VCC/VSS)

•If there are multiple VCC and VSS pins, from the point of view of device design, pins to be of the same potentialare connected the inside of the device to prevent such malfunctioning as latch up.

To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,and observe the standard for total output current, be sure to connect the VCC and VSS pins to the power supplyand ground externally.

•Connect VCC and VSS to the device from the current supply source at a low impedance.

•As a measure against power supply noise, connect a capacitor of about 0.1 µF as a bypass capacitor betweenVCC and VSS in the vicinity of VCC and VSS pins of the device

VccVss

VccVssVcc

Vss

MB90860ESeries

VccVss

VssVcc

4.Mode Pin (MD0 to MD2)

Connect the mode pin directly to VCC or VSS pins.

To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as tominimize the distance from the mode pins to VCC or VSS pins and to provide a low-impedance connection.

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MB90860E Series

5.Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs

Make sure to turn on the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN23)after turning-on the digital power supply (VCC) .

Turn-off the digital power after turning off the A/D converter supply and analog inputs. In this case, make surethat the voltage not exceed AVRH or AVCC (turning on/off the analog and digital power supplies simultaneouslyis acceptable) .

6.Connection of Unused Pins of A/D Converter if A/D Converter is used

Connect unused pins of A/D converter to AVCC = VCC, AVSS = AVRH = AVRL = VSS.

7.Crystal Oscillator Circuit

X0, X1 pins and X0A, X1A pins may be possible causes of abnormal operations. Make sure to provide bypasscapacitors via shortest distance from X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic oscillator)and ground lines, and make sure, to the utmost effort, that lines of oscillation circuit not cross the lines of othercircuits.

It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and X0A, X1A pinswith a ground area for stabilizing the operation.

8.Pull-up/down resistors

The MB90860E Series does not support internal pull-up/down resistors (Port 0 to Port 3: built-in pull-up resistors).Use external components where needed.

9.Using external clock

To use external clock, drive the X0 pin and leave X1 pin open.

MB90860E SeriesX0

Open

X1

10.Precautions for when not using a sub clock signal

If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave theX1A pin open.

11.Notes on during operation of PLL clock mode

If the PLL clock mode is selected, the MB90860 series attempt to be working with the self-oscillating circuit evenwhen there is no external oscillator or external clock input is stopped. Performance of this operation, however,cannot be guaranteed.

12.Notes on Energization

To prevent the internal regulator circuit from malfunctioning, set the voltage rise time during energization at 50or more µs (0.2 V to 2.7 V)

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MB90860E Series

13.Stabilization of power supply voltage

A sudden change in the supply voltage may cause the device to malfunction even within the specified VCC supplyvoltage operating range. Therefore, the VCC supply voltage should be stabilized.

For the reference, stabilize the supply voltage by setting the following value.

•VCC ripple variations (peak-to-peak value) at commercial frequencies (50 Hz/60 Hz) fall below 10% of thestandard VCC supply voltage

•The coefficient of fluctuation does not exceed 0.1 V/ms at instantaneous power switching.

14.Initialization

In the device, there are internal registers which are initialized only by a power-on reset. To initialize these registers,turn on the power again.

15.Port 0 to port 3 output during Power-on (External-bus mode)

As shown below, when power is turned on in External-Bus mode, in spite of reset input, there is a possibility thatoutput signal of Port 0 to Port 3 might be unstable.1/2VCCVCCPort 0 to Port 3Port 0 to Port 3 outputsmight be unstablePort 0 to Port 3 outputs = Hi-Z16.Flash security Function

The security bit is located in the area of the flash memory.

If protection code 01H is written in the security bit, the flash memory is in the protected state by security.Therefore please do not write 01H in this address if you do not use the security function.Please refer to following table for the address of the security bit.

Flash memory size

MB90F867E(S)

Embedded 1 Mbit Flash Memory

Address for security bit

FE0001H

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MB90860E Series

■BLOCK DIAGRAMS

•MB90V340E-101/102X0,X1X0A,X1A*RST

ClockController

16LXCPU

RAM 30 Kbytes

I/O Timer 0InputCapture8 channelsOutputCompare8 channels

FRCK0

IN7 to IN0

OUT7 to OUT0

Prescaler5 channels

SOT4 to SOT0SCK4 to SCK0SIN4 to SIN0AVCCAVSS

AN23 to AN0AVRHAVRLADTG

I/O Timer 1

FRCK1

UART5 channels

CANController3 channels

16-bit Reload

Timer 4 channels

RX2 to RX0TX2 to TX0

8/10-bit ADC24 channels

F2MC-16 BusTIN3 to TIN0TOT3 to TOT0AD15 to AD00A23 to A16

ALERDWR/WRLWRHHRQHAKRDYCLK

DA01, DA00

10-bitDAC2 channels8/16-bitPPG16 channelsI2CInterface2 channels

ExternalBusInterface

PPGF to PPG0

SDA1, SDA0SCL1, SCL0

ExternalInterrupt16 channelsClockMonitor

INT15 to INT8(INT15R to INT8R)

INT7 to INT0

DMACCKOT

* : Only for MB90V340E-102

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MB90860E Series

•MB90867E(S), MB90F867E(S)X0,X1X0A,X1A*RST

ClockController

16LXCPU

RAM 6 Kbytes

I/O Timer 0InputCapture8 channels

FRCK0

IN7 to IN0

ROM/Flash 128 KbytesPrescaler4 channels

OutputCompare8 channelsI/O Timer 1

OUT7 to OUT0

FRCK1

SOT3 to SOT0SCK3 to SCK0SIN3 to SIN0AVCCAVSS

AN15 to AN0AN23 to AN16AVRHAVRLADTG

UART4 channels

8/10-bit ADC24 channelsF2MC-16 Bus16-bit Reload

Timer 4 channels

TIN3 to TIN0TOT3 to TOT0AD15 to AD00A23 to A16

ALERDWR/WRLWRHHRQHAKRDYCLK

ExternalBusInterface

PPGF to PPG0

8/16-bitPPG16 channelsI2CInterface2 channels

SDA1, SDA0SCL1, SCL0ExternalInterrupt16 channelsClockMonitor

INT15 to INT8(INT15R to INT8R)INT7 to INT0

DMACCKOT

* : Only for devices without ‘S’ Suffix

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MB90860E Series

■MEMORY MAPMB90V340E-101/102000000H0000EFH000100HPeripheralExternal access areaMB90867E(S)MB90F867E(S)000000H0000EFH000100HPeripheralExternal access areaRAM 6 Kbytes003FFFHRAM 30 Kbytes0078FFH007900HPeripheral007FFFH008000H00FFFFHF80000HF8FFFFHF90000HF9FFFFHFA0000HFAFFFFHFB0000HFBFFFFHFC0000HFCFFFFHFD0000HFDFFFFHFE0000HFEFFFFHFF0000HFFFFFFHROM (F8 bank)ROM (F9 bank)ROM (FA bank)ROM (FB bank)ROM (FC bank)ROM (FD bank)ROM (image of FF bank)External access area007900H007FFFH008000H00FFFFHPeripheralROM (image of FF bank)External access areaFE0000HROM (FE bank)ROM (FF bank)FFFFFFHFEFFFFHFF0000HROM (FE bank)ROM (FF bank): No accessNote : The high-order portion of bank 00 gives the image of the FF bank ROM to make the small model of the C

compiler effective. Since the low-order 16 bits are the same, the table in ROM can be referenced without using the far specification in the pointer declaration.

For example, an attempt to access 00C000H accesses the value at FFC000H in ROM.

The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00.

The image between FF8000H and FFFFFFH is visible in bank 00, while the image between FF0000H and FF7FFFH is visible only in bank FF.

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MB90860E Series

■I/O MAP

Address

Register

Abbrevia-tionPDR0PDR1PDR2PDR3PDR4PDR5PDR6PDR7PDR8PDR9PDRAADER5ADER6ADER7ILSR0ILSR1DDR0DDR1DDR2DDR3DDR4DDR5DDR6DDR7DDR8DDR9DDRAReservedPUCR0PUCR1PUCR2PUCR3

R/WR/WR/WW, R/W

Port 0Port 1Port 2Port 3

00000000B00000000B00000000B00000000B(Continued)

AccessR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W

Resource name

Port 0Port 1Port 2Port 3Port 4Port 5Port 6Port 7Port 8Port 9Port APort 5, A/DPort 6, A/DPort 7, A/DPortsPortsPort 0Port 1Port 2Port 3Port 4Port 5Port 6Port 7Port 8Port 9Port A

Initial valueXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB11111111B11111111B11111111BXXXXXXXXBXXXX0XXXB00000000B00000000B00000000B00000000B00000000B00000000B00000000B00000000B00000000B00000000B00000100B

000000HPort 0 Data Register000001HPort 1 Data Register000002HPort 2 Data Register000003HPort 3 Data Register000004HPort 4 Data Register000005HPort 5 Data Register000006HPort 6 Data Register000007HPort 7 Data Register000008HPort 8 Data Register000009HPort 9 Data Register00000AHPort A Data Register

00000BHPort 5 Analog Input Enable Register00000CHPort 6 Analog Input Enable Register00000DHPort 7 Analog Input Enable Register00000EHInput Level Select Register 000000FHInput Level Select Register 1000010HPort 0 Direction Register000011HPort 1 Direction Register000012HPort 2 Direction Register000013HPort 3 Direction Register000014HPort 4 Direction Register000015HPort 5 Direction Register000016HPort 6 Direction Register000017HPort 7 Direction Register000018HPort 8 Direction Register000019HPort 9 Direction Register00001AHPort A Direction Register00001BH

00001CHPort 0 Pull-up Control Register00001DHPort 1 Pull-up Control Register00001EHPort 2 Pull-up Control Register00001FHPort 3 Pull-up Control Register

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MB90860E Series

AddressRegister

Abbrevia-tionSMR0SCR0RDR0/TDR0SSR0ECCR0ESCR0BGR00BGR01SMR1SCR1RDR1/TDR1SSR1ECCR1ESCR1BGR10BGR11PPGC0PPGC1PPG01ReservedPPGC2PPGC3PPG23ReservedPPGC4PPGC5PPG45PACSR1PPGC6PPGC7PPG67Reserved

AccessW,R/WW,R/WR/WR,R/WR,W,R/WR/WR/WR/WW,R/WW,R/WR/WR,R/WR,W,R/WR/WR/WR/WW,R/WW,R/WR/WW,R/WW,R/WR/WW,R/WW,R/WR/WR/WW,R/WW,R/WR/W

Resource nameInitial value

00000000B00000000B00000000B

UART0

00001000B000000XXB00000100B00000000B00000000B00000000B00000000B00000000B

UART1

00001000B000000XXB00000100B00000000B00000000B0X000XX1B

16-bit PPG 0/1

0X000001B000000X0B0X000XX1B

16-bit PPG 2/3

0X000001B000000X0B0X000XX1B

16-bit PPG 4/5Address Match Detection 116-bit PPG 6/7

0X000001B000000X0B00000000B0X000XX1B0X000001B000000X0B(Continued)

000020HSerial Mode Register 0000021HSerial Control Register 0

000022HReception/Transmission Data Register 0000023HSerial Status Register 0000024H

Extended Communication Control Register 0

000025HExtended Status/Control Register 0000026HBaud Rate Generator Register 00000027HBaud Rate Generator Register 01000028HSerial Mode Register 1000029HSerial Control Register 1

00002AHReception/Transmission Data Register 100002BHSerial Status Register 100002CH

Extended Communication Control Register 1

00002DHExtended Status/Control Register 100002EHBaud Rate Generator Register 1000002FHBaud Rate Generator Register 11000030HPPG 0 Operation Mode Control Register000031HPPG 1 Operation Mode Control Register000032HPPG 0/PPG 1 Count Clock Select Register000033H

000034HPPG 2 Operation Mode Control Register000035HPPG 3 Operation Mode Control Register000036HPPG 2/PPG 3 Count Clock Select Register000037H

000038HPPG 4 Operation Mode Control Register000039HPPG 5 Operation Mode Control Register00003AHPPG 4/PPG 5 Clock Select Register00003BHAddress Detect Control Register 100003CHPPG 6 Operation Mode Control Register00003DHPPG 7 Operation Mode Control Register00003EHPPG 6/PPG 7 Count Clock Control Register00003FH

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MB90860E Series

AddressRegister

Abbrevia-tionPPGC8PPGC9PPGReservedPPGCAPPGCBPPGABReservedPPGCCPPGCDPPGCDReservedPPGCEPPGCFPPGEFReservedICS01ICE01ICS23ICE23ICS45ICE45ICS67ICE67OCS0OCS1OCS2OCS3OCS4OCS5OCS6OCS7

AccessW,R/WW,R/WR/W

Resource nameInitial value0X000XX1B

000040HPPG 8 Operation Mode Control Register000041HPPG 9 Operation Mode Control Register000042H000043H

000044HPPG A Operation Mode Control Register000045HPPG B Operation Mode Control Register000046H000047H

000048HPPG C Operation Mode Control Register000049HPPG D Operation Mode Control Register00004AH00004BH

00004CHPPG E Operation Mode Control Register00004DHPPG F Operation Mode Control Register00004EH00004FH

000050HInput Capture Control Status 0/1000051HInput Capture Edge 0/1

000052HInput Capture Control Status 2/3000053HInput Capture Edge 2/3

0000HInput Capture Control Status 4/5000055HInput Capture Edge 4/5

000056HInput Capture Control Status 6/7000057HInput Capture Edge 6/7

000058HOutput Compare Control Status 0000059HOutput Compare Control Status 100005AHOutput Compare Control Status 200005BHOutput Compare Control Status 300005CHOutput Compare Control Status 400005DHOutput Compare Control Status 500005EHOutput Compare Control Status 600005FHOutput Compare Control Status 7

PPG E/PPG F Count Clock Select Register

PPG C/PPG D Count Clock Select Register

PPG A/PPG B Count Clock Select Register

PPG 8/PPG 9 Count Clock Control Register

16-bit PPG 8/9

0X000001B000000X0B

W,R/WW,R/WR/W

16-bit PPG A/B

0X000XX1B0X000001B000000X0B

W,R/WW,R/WR/W

16-bit PPG C/D

0X000XX1B0X000001B000000X0B

W,R/WW,R/WR/W

16-bit PPG E/F

0X000XX1B0X000001B000000X0B

R/WR/W, RR/WRR/WRR/WR/W, RR/WR/WR/WR/WR/WR/WR/WR/W

Input Capture 0/1Input Capture 2/3Input Capture 4/5Input Capture 6/7Output Compare 0/1Output Compare 2/3Output Compare 4/5Output Compare 6/7

00000000BXXX0X0XXB00000000BXXXXXXXXB00000000BXXXXXXXXB00000000BXXX000XXB0000XX00B0XX00000B0000XX00B0XX00000B0000XX00B0XX00000B0000XX00B0XX00000B(Continued)

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MB90860E Series

AddressRegister

Abbrevia-tionTMCSR0TMCSR0TMCSR1TMCSR1TMCSR2TMCSR2TMCSR3TMCSR3ADCS0ADCS1ADCR0ADCR1ADSR0ADSR1ReservedROMMReserved

AccessR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WRRR/WR/WW

Resource name16-bit Reload Timer 016-bit Reload Timer 116-bit Reload Timer 216-bit Reload Timer 3

Initial value00000000BXXXX0000B00000000BXXXX0000B00000000BXXXX0000B00000000BXXXX0000B000XXXX0B0000000XB00000000BXXXXXX00B00000000B00000000B

000060HTimer Control Status 0000061HTimer Control Status 0000062HTimer Control Status 1000063HTimer Control Status 10000HTimer Control Status 2000065HTimer Control Status 2000066HTimer Control Status 3000067HTimer Control Status 3000068HA/D Control Status 0000069HA/D Control Status 100006AHA/D Data 000006BHA/D Data 100006CHADC Setting 000006DHADC Setting 100006EH

00006FHROM Mirror Function Select000070H

to 00009AH00009BH

DMA Descriptor Channel Specified Register

A/D Converter

ROM MirrorXXXXXXX1B

DCSRDSRLDSRHPACSR0DIRRLPMCRCKSCRReservedDSSRARSRHACRECSRWDTC

R/WR/WR/WR/WR/WW,R/WR,R/W

Address Match Detection 0Low Power Control CircuitLow Power Control Circuit

DMA

00000000B00000000B00000000B00000000B

00009CHDMA Status L Register00009DHDMA Status H Register

00009EHAddress Detect Control Register 000009FHDelayed Interrupt/release0000A0HLow-power Mode Control Register0000A1HClock Selection Register0000A2H, 0000A3H

0000A4HDMA Stop Status Register

0000A5HAutomatic Ready Function Select Register0000A6HExternal Address Output Control Register0000A7HBus Control Signal Selection Register0000A8HWatchdog Control Register

Delayed InterruptXXXXXXX0B

00011000B11111100B

R/WWWWR,W

DMAExternal Memory

AccessWatchdog Timer

00000000B0011XX00B00000000B0000000XBXXXXX111B(Continued)

30

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MB90860E Series

AddressRegister

Abbrevia-tionTBTCWTC

AccessW,R/WR,R/WR/WR/WR,R/W

Resource nameTime Base TimerWatch Timer

Initial value1XX00100B1X001000B00000000B00000000B000X0000B

0000A9HTime Base Timer Control Register0000AAHWatch Timer Control Register0000ABH

0000ACHDMA Enable L Register0000ADHDMA Enable H Register0000AEH0000AFH

0000B0HInterrupt Control Register 000000B1HInterrupt Control Register 010000B2HInterrupt Control Register 020000B3HInterrupt Control Register 030000B4HInterrupt Control Register 040000B5HInterrupt Control Register 050000B6HInterrupt Control Register 060000B7HInterrupt Control Register 070000B8HInterrupt Control Register 080000B9HInterrupt Control Register 090000BAHInterrupt Control Register 100000BBHInterrupt Control Register 110000BCHInterrupt Control Register 120000BDHInterrupt Control Register 130000BEHInterrupt Control Register 140000BFHInterrupt Control Register 150000C0HD/A Converter Data 0 Register0000C1HD/A Converter Data 1 Register0000C2HD/A Control 0 Register0000C3HD/A Control 1 Register0000C4H, 0000C5H

0000C6HExternal Interrupt Enable 00000C7HExternal Interrupt Source 00000C8HExternal Interrupt Level Setting 00000C9HExternal Interrupt Level Setting 0

Flash Control Status Register (Flash Devices only.Otherwise reserved)

ReservedDERLDERHFMCSReservedICR00ICR01ICR02ICR03ICR04ICR05ICR06ICR07ICR08ICR09ICR10ICR11ICR12ICR13ICR14ICR15DAT0DAT1DACR0DACR1ReservedENIR0EIRR0ELVR0ELVR0

R/WR/WR/WR/W

External Interrupt 0

00000000BXXXXXXXXB00000000B00000000B(Continued)

W,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WW,R/WR/WR/WR/WR/W

D/A ConverterInterrupt Control

00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111B00000111BXXXXXXXXBXXXXXXXXBXXXXXXX0BXXXXXXX0B

DMA

Flash Memory

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MB90860E Series

AddressRegister

Abbrevia-tionENIR1EIRR1ELVR1ELVR1EISSRPSCCRBAPLBAPMBAPHDMACSIOALIOAHDCTLDCTHSMR2SCR2RDR2/TDR2SSR2ECCR2ESCR2BGR20BGR21

AccessR/WR/WR/WR/WR/WWR/WR/WR/WR/WR/WR/WR/WR/WW,R/WW,R/WR/WR,R/WR,W,R/WR/WR/WR/W

Resource nameInitial value00000000BXXXXXXXXB

0000CAHExternal Interrupt Enable 10000CBHExternal Interrupt Source 10000CCHExternal Interrupt Level Setting 10000CDHExternal Interrupt Level Setting 10000CEHExternal Interrupt Source Select0000CFHPLL/Sub Clock Control Register0000D0HDMA Buffer Address Pointer L Register0000D1HDMA Buffer Address Pointer M Register0000D2HDMA Buffer Address Pointer H Register0000D3HDMA Control Register0000D4H0000D5H

I/O Register Address Pointer L Register

I/O Register Address Pointer H Register

External Interrupt 100000000B00000000B00000000B

PLLXXXX0000BXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB

DMA

XXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB00000000B00000000B00000000B

0000D6HData Counter L Register0000D7HData Counter H Register0000D8HSerial Mode Register 20000D9HSerial Control Register 20000DAH

Reception/Transmission Data Register 2

Extended Communication Control Register 2

0000DBHSerial Status Register 20000DCH

UART2

00001000B000000XXB00000100B00000000B00000000B

0000DDHExtended Status Control Register 20000DEHBaud Rate Generator Register 200000DFHBaud Rate Generator Register 210000E0H

to 0000FFH007900H007901H007902H007903H007904H007905H007906H007907H

32

Reload Register L0Reload Register H0Reload Register L1Reload Register H1Reload Register L2Reload Register H2Reload Register L3Reload Register H3

External areaPRLL0PRLH0PRLL1PRLH1PRLL2PRLH2PRLL3PRLH3

R/WR/WR/WR/WR/WR/WR/WR/W

16-bit PPG 2/316-bit PPG 0/1

XXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB(Continued)

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MB90860E Series

AddressRegister

Abbrevia-tionPRLL4PRLH4PRLL5PRLH5PRLL6PRLH6PRLL7PRLH7PRLL8PRLH8PRLL9PRLH9PRLLAPRLHAPRLLBPRLHBPRLLCPRLHCPRLLDPRLHDPRLLEPRLHEPRLLFPRLHFIPCP0IPCP0IPCP1IPCP1IPCP2IPCP2IPCP3IPCP3IPCP4IPCP4IPCP5IPCP5

AccessR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WRRRRRRRRRRRR

Resource nameInitial valueXXXXXXXXB

007908HReload Register L4007909HReload Register H400790AHReload Register L500790BHReload Register H500790CHReload Register L600790DHReload Register H600790EHReload Register L700790FHReload Register H7007910HReload Register L8007911HReload Register H8007912HReload Register L9007913HReload Register H9007914HReload Register LA007915HReload Register HA007916HReload Register LB007917HReload Register HB007918HReload Register LC007919HReload Register HC00791AHReload Register LD00791BHReload Register HD00791CHReload Register LE00791DHReload Register HE00791EHReload Register LF00791FHReload Register HF007920HInput Capture 0007921HInput Capture 0007922HInput Capture 1007923HInput Capture 1007924HInput Capture 2007925HInput Capture 2007926HInput Capture 3007927HInput Capture 3007928HInput Capture 4007929HInput Capture 400792AHInput Capture 500792BHInput Capture 5

16-bit PPG 4/5

XXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB(Continued)

33

16-bit PPG 6/7

16-bit PPG 8/9

16-bit PPG A/B

16-bit PPG C/D

16-bit PPG E/F

Input Capture 0/1

Input Capture 2/3

Input Capture 4/5

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MB90860E Series

AddressRegister

Abbrevia-tionIPCP6IPCP6IPCP7IPCP7OCCP0OCCP0OCCP1OCCP1OCCP2OCCP2OCCP3OCCP3OCCP4OCCP4OCCP5OCCP5OCCP6OCCP6OCCP7OCCP7TCDT0TCDT0TCCSL0TCCSH0TCDT1TCDT1TCCSL1TCCSH1TMR0/TMRLR0TMR1/TMRLR1TMR2/TMRLR2TMR3/TMRLR3

AccessRRRRR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W

Resource nameInitial valueXXXXXXXXB

00792CHInput Capture 600792DHInput Capture 600792EHInput Capture 700792FHInput Capture 7007930HOutput Compare 0007931HOutput Compare 0007932HOutput Compare 1007933HOutput Compare 1007934HOutput Compare 2007935HOutput Compare 2007936HOutput Compare 3007937HOutput Compare 3007938HOutput Compare 4007939HOutput Compare 400793AHOutput Compare 500793BHOutput Compare 500793CHOutput Compare 600793DHOutput Compare 600793EHOutput Compare 700793FHOutput Compare 7007940HTimer Data 0007941HTimer Data 0

007942HTimer Control Status 0007943HTimer Control Status 0007944HTimer Data 1007945HTimer Data 1

007946HTimer Control Status 1007947HTimer Control Status 1007948H007949H00794AH00794BH00794CH00794DH00794EH00794FH

Timer 0/Reload 0Timer 1/Reload 1Timer 2/Reload 2Timer 3/Reload 3

Input Capture 6/7

XXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB00000000B00000000B00000000B0XXXXXXXB00000000B00000000B00000000B0XXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB(Continued)

Output Compare 0/1

Output Compare 2/3

Output Compare 4/5

Output Compare 6/7

I/O Timer 0

I/O Timer 1

16-bit Reload Timer 016-bit Reload Timer 116-bit Reload Timer 216-bit Reload Timer 3

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MB90860E Series

AddressRegister

Abbrevia-tionSMR3SCR3RDR3/TDR3SSR3ECCR3ESCR3BGR30BGR31SMR4SCR4RDR4/TDR4SSR4ECCR4ESCR4BGR40BGR41

AccessW,R/WW,R/WR/WR,R/WR,W,R/WR/WR/WR/WW,R/WW,R/WR/WR,R/WR,W,R/WR/WR/WR/W

Resource nameInitial value00000000B00000000B00000000B

007950HSerial Mode Register 3007951HSerial Control Register 3007952H

Reception/Transmission Data Register 3

Extended Communication Control Register 3

007953HSerial Status Register 30079H

UART3

00001000B000000XXB00000100B00000000B00000000B00000000B00000000B00000000B

007955HExtended Status Control Register007956HBaud Rate Generator Register 30007957HBaud Rate Generator Register 31007958HSerial Mode Register 4007959HSerial Control Register 400795AH

Reception/Transmission Data Register 4

Extended Communication Control Register 4

00795BHSerial Status Register 400795CH

UART4

00001000B000000XXB00000100B00000000B00000000B

00795DHExtended Status Control Register00795EHBaud Rate Generator Register 4000795FHBaud Rate generator Register 41007960H

to 00796BH

00796CHClock Output Enable Register00796DH

to 00796FH

007970HI2C Bus Status Register 0007971HI2C bus Control Register 0007972H007973H

I2C 10-bit Slave Address Register 0

ReservedCLKRReservedIBSR0IBCR0ITBAL0ITBAH0ITMKL0ITMKH0ISBA0ISMK0IDAR0Reserved

(Continued)

35

RW,R/WR/WR/WR/WR/WR/WR/WR/W

I2C Interface 0

00000000B00000000B00000000B00000000B11111111B00111111B00000000B01111111B00000000B

R/W

Clock Monitor

XXXX0000B

007974HI2C 10-bit Slave Address Mask 007975HRegister 0

007976HI2C 7-bit Slave Address Register 0007977HI2C 7-bit Slave Address Mask Register 0007978HI2C Data Register 0007979H, 00797AH

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MB90860E Series

AddressRegister

Abbrevia-tionICCR0

AccessR/W

Resource nameI2C Interface 0

Initial value00011111B

00797BHI2C Clock Control Register 000797CH

to 00797FH

007980HI2C Bus Status Register 1007981HI2C Bus Control Register 1007982H007983H

I2C 10-bit Slave Address Register 1

ReservedIBSR1IBCR1ITBAL1ITBAH1ITMKL1ITMKH1ISBA1ISMK1IDAR1ReservedICCR1Reserved

Clock modulator control register

(setting prohibited)

CMCR

R, R/W

Clock modulator (using prohibited)

0001X000B

R/W

I2C Interface 1

00011111B

RW,R/WR/WR/WR/WR/WR/WR/WR/W

I2C Interface 1

00000000B00000000B00000000B00000000B11111111B00111111B00000000B01111111B00000000B

007984HI2C 10-bit Slave Address Mask 007985HRegister 1

007986HI2C 7-bit Slave Address Register 1007987HI2C 7-bit Slave Address Mask Register 1007988HI2C Data Register 10079H, 00798AH

00798BHI2C Clock Control Register 100798CH

to 0079C1H0079C2H0079C3H

to 0079DFH

0079E0HDetect Address Setting 00079E1HDetect Address Setting 00079E2HDetect Address Setting 00079E3HDetect Address Setting 10079E4HDetect Address Setting 10079E5HDetect Address Setting 10079E6HDetect Address Setting 20079E7HDetect Address Setting 20079E8HDetect Address Setting 20079E9H

to 0079EFH

ReservedPADR0PADR0PADR0PADR1PADR1PADR1PADR2PADR2PADR2Reserved

(Continued)

R/WR/WR/WR/WR/WR/WR/WR/WR/W

Address Match Detection 0

XXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB

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MB90860E Series

(Continued)Address

Register

Abbrevia-tionPADR3PADR3PADR3PADR4PADR4PADR4PADR5PADR5PADR5Reserved

AccessR/WR/WR/WR/WR/WR/WR/WR/WR/W

Address Match Detection 1Resource name

Initial valueXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXBXXXXXXXXB

0079F0HDetect Address Setting 30079F1HDetect Address Setting 30079F2HDetect Address Setting 30079F3HDetect Address Setting 40079F4HDetect Address Setting 40079F5HDetect Address Setting 40079F6HDetect Address Setting 50079F7HDetect Address Setting 50079F8HDetect Address Setting 50079F9H

to 007FFFH

Notes : • Initial value of “X” represents unknown value.

• Any write access to reserved addresses in I/O map should not be performed. A read access to reserved addresses results in reading “X”.

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MB90860E Series

■INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER

Interrupt cause

Reset

INT9 instructionException (Reserved) (Reserved) Input Capture 6Input Capture 7I2C0 (Reserved)

16-bit Reload Timer 016-bit Reload Timer 116-bit Reload Timer 216-bit Reload Timer 3PPG 0/1/4/5PPG 2/3/6/7PPG 8/9/C/DPPG A/B/E/FTime Base Timer

External Interrupt 0 to 3, 8 to 11Watch Timer

External Interrupt 4 to 7, 12 to 158/10-bit A/D ConverterI/O Timer 0, I/O Timer 1Input Capture 4/5, I2C1Output Compare 0/1/4/5Input Capture 0 to 3Output Compare 2/3/6/7UART 0 ReceptionUART 0 TransmissionUART 1 Reception / UART 3 ReceptionUART 1 Transmission / UART 3 Transmission

EI2OS clearNNNNNY1Y1NNY1Y1Y1Y1NNNNNY1NY1Y1NY1Y1Y1Y1Y2Y1Y2Y1

DMA ch number⎯⎯⎯⎯⎯⎯⎯⎯⎯012⎯⎯⎯⎯⎯⎯3⎯45⎯6710111213

Interrupt vectorNumber#08#09#10#11#12#13#14#15#16#17#18#19#20#21#22#23#24#25#26#27#28#29#30#31#32#33#34#35#36#37#38

AddressFFFFDCHFFFFD8HFFFFD4HFFFFD0HFFFFCCHFFFFC8HFFFFC4HFFFFC0HFFFFBCHFFFFB8HFFFFB4HFFFFB0HFFFFACHFFFFA8HFFFFA4HFFFFA0HFFFF9CHFFFF98HFFFF94HFFFF90HFFFF8CHFFFF88HFFFF84HFFFF80HFFFF7CHFFFF78HFFFF74HFFFF70HFFFF6CHFFFF68H

ICR13

FFFFH

(Continued)0000BDH

Interrupt control

registerNumber⎯⎯⎯ICR00ICR01ICR02ICR03ICR04ICR05ICR06ICR07ICR08ICR09ICR10ICR11ICR12

Address⎯⎯⎯0000B0H0000B1H0000B2H0000B3H0000B4H0000B5H0000B6H0000B7H0000B8H0000B9H0000BAH0000BBH0000BCH

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MB90860E Series

(Continued)

Interrupt cause

UART 2 Reception / UART 4 ReceptionUART 2 Transmission / UART 4 TransmissionFlash MemoryDelayed interruptY1 : Usable

Y2 : Usable, with EI2OS stop functionN : Unusable

Notes : •The peripheral resources sharing the ICR register have the same interrupt level.

•When two peripheral resources share the ICR register, only one can use Extended Intelligent I/O Service at a time.

•When either of the two peripheral resources sharing the ICR register specifies Extended Intelligent I/O Service, the other one cannot use interrupts.

EIOS clear

2

DMA ch number1415⎯⎯

Interrupt vectorNumber#39#40#41#42

AddressFFFF60H

Interrupt control

registerNumber

Address

Y2Y1NN

ICR14

FFFF5CHFFFF58HFFFFH

ICR15

0000BEH

0000BFH

39

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MB90860E Series

■ELECTRICAL CHARACTERISTICS

1.Absolute Maximum Ratings

Parameter

SymbolVCC

Power supply voltage*1

AVCC

RatingMinVSS − 0.3VSS − 0.3

MaxVSS + 6.0VSS + 6.0VSS + 6.0VSS + 6.0VSS + 6.0+4.040110050−15−4−100−50340+105+150

UnitVVVVVmAmAmAmAmAmAmAmAmAmAmW °C °C

VCC = AVCC*2

AVCC ≥ AVRH, AVCC ≥ AVRL, AVRH ≥ AVRL*3*3*5*5*4*4*4*4*4*4*4*4

Remarks

AVRH,

VSS − 0.3

AVRLVIVOICLAMPΣ|ICLAMP|IOLIOLAVΣIOLΣIOLAVIOHIOHAVΣIOHΣIOHAVPDTATSTG

VSS − 0.3VSS − 0.3−4.0⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯−40−55

Input voltage*1Output voltage*1

Maximum Clamp CurrentTotal Maximum Clamp Current“L” level maximum output current“L” level average output current“L” level maximum overall output current“L” level average overall output current“H” level maximum output current“H” level average output current“H” level maximum overall output current“H” level average overall output currentPower consumptionOperating temperatureStorage temperature

*1 : This parameter is based on VSS = AVSS = 0 V.

*2 : Set AVCC and VCC to the same voltage. Make sure that AVCC does not exceed VCC and that the voltage at the

analog inputs does not exceed AVCC when the power is switched on.*3 : VI and VO should not exceed VCC + 0.3 V. VI should not exceed the specified ratings. However if the maximum

current to/from an input is limited by some means with external components, the ICLAMP rating supersedes the VI rating.*4 : Applicable to pins : P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P80 to P87, P90 to P97, PA0 to PA1

(Continued)

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MB90860E Series

(Continued)

*5 : • Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47,

P50 to P57 (evaluation device : P50 to P55) , P60 to P67, P70 to P77, P80 to P87, P90 to P97, PA0 to PA1

•Use within recommended operating conditions.•Use at DC voltage (current)

•The +B signal should always be applied a limiting resistance placed between the +B signal and themicrocontroller.

•The value of the limiting resistance should be set so that when the +B signal is applied the input current tothe microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.•Note that when the microcontroller drive current is low, such as in the power saving modes, the +B inputpotential may pass through the protective diode and increase the potential at the VCC pin, and this may affectother devices.

•Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V) , the powersupply is provided from the pins, so that incomplete operation may result.

•Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset.•Care must be taken not to leave the +B input pin open.•Sample recommended circuits: •Input/output equivalent circuitsProtective diodeVCCLimitingresistance+B input (0 V to 16 V)P-chN-chRWARNING:Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

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MB90860E Series

2.Recommended Conditions

(VSS = AVSS = 0 V)

Parameter

Symbol

Value

Min4.0

VCC, AVCC

3..53.0

Smooth capacitorOperating temperature

CSTA

0.1−40

Typ5.05.05.0⎯⎯⎯

Max5.55.55.55.51.0+105

UnitVVVVµF °C

Remarks

Under normal operation

Under normal operation, when not using the A/D converter and not Flash programming.When External bus is used.Maintains RAM data in stop modeUse a ceramic capacitor or capac-itor of better AC characteristics. Capacitor at the VCC should be greater than this capacitor.

Power supply voltage

CCSC Pin Connection DiagramWARNING:The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device isoperated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operationoutside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented onthe data sheet. Users considering application outside the listed conditions are advised to contact theirFUJITSU representatives beforehand.

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MB90860E Series

3.DC Characteristics

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Parameter

Sym-bol

Pin

Condition

Value

Min

Typ

Max

Unit

Remarks

Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P83)Port inputs if

Automotive input levels are selected

Port inputs if TTL input levels are selectedP12, P50, P82, P85 inputs if CMOS input levels are selectedP44, P45, P46, P47 in-puts if CMOS hysteresis input levels are selectedRST input pin (CMOS hysteresis) MD input pin

Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P83)Port inputs if

Automotive input levels are selected

Port inputs if TTL

input levels are selectedP12, P50, P82, P85 inputs if CMOS input levels are selectedP44, P45, P46, P47 in-puts if CMOS hysteresis input levels are selectedRST input pin (CMOS hysteresis) MD input pin

VIHS⎯⎯0.8 VCC⎯VCC + 0.3V

VIHA

Input H voltage (At VCC = 5 V ± 10%)

VIHTVIHS

⎯⎯⎯

⎯⎯⎯

0.8 VCC

2.00.7 VCC

⎯⎯⎯

VCC + 0.3VCC + 0.3VCC + 0.3

VVV

VIHIVIHRVIHM

⎯⎯⎯

⎯⎯⎯

0.7 VCC0.8 VCCVCC − 0.3

⎯⎯⎯

VCC + 0.3VCC + 0.3VCC + 0.3

VVV

VILS⎯⎯VSS − 0.3⎯0.2 VCCV

VILA

Input L voltage (At VCC = 5 V ± 10%)

VILTVILS

⎯⎯⎯

⎯⎯⎯

VSS − 0.3VSS − 0.3VSS − 0.3

⎯⎯⎯

0.5 VCC

0.80.3 VCC

VVV

VILIVILRVILM

Output H voltageOutput H voltageOutput L voltageOutput L voltage

VOHVOHIVOLVOLI

⎯⎯⎯Normal outputs

⎯⎯⎯

VSS − 0.3VSS − 0.3VSS − 0.3

⎯⎯⎯⎯⎯⎯⎯

0.3 VCC0.2 VCCVSS + 0.3⎯⎯0.40.4

VVVVVVV

VCC = 4.5 V,

VCC − 0.5

IOH = −4.0 mA

I2C current VCC = 4.5 V,

VCC − 0.5

outputsIOH = −3.0 mANormal outputs

VCC = 4.5 V, IOL = 4.0 mA

⎯⎯

I2C current VCC = 4.5 V, outputsIOL = 3.0 mA

(Continued)

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MB90860E Series

(Continued)

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

ParameterInput leak currentPull-up resistance

Sym-bolIIL

Pin⎯P00 to P07,P10 to P17,P20 to P27,P30 to P37,

RS2

Condition

VCC = 5.5 V, VSS < VI < VCC

ValueMin−1

Typ⎯

Max + 1

UnitRemarksµA

RUP

⎯2550100kΩ

Except kΩFlash

devicesmAmAmAmAmA

Flash devicesFlash devices

Pull-down resistance

RDOWN⎯

VCC = 5.0 V,

Internal frequency : 24 MHz, At normal operation.

2550100

⎯⎯⎯⎯⎯

557075250.3

708590350.8

ICC

VCC = 5.0 V,

Internal frequency : 24 MHz, At writing FLASH memory.VCC = 5.0 V,

Internal frequency : 24 MHz, At erasing FLASH memory.

ICCS

VCC = 5.0 V,

Internal frequency : 24 MHz, At Sleep mode.

VCC = 5.0 V,

Internal frequency : 2 MHz, At Main Timer mode

VCC

VCC = 5.0 V,

Internal frequency : 24 MHz, At PLL Timer mode,

external frequency = 4 MHzVCC = 5.0 V

Internal frequency : 8 kHz,At sub operationTA = +25°C

VCC = 5.0 V

Internal frequency : 8 kHz,At sub sleepTA = +25°C

VCC = 5.0 V

Internal frequency : 8 kHz,At watch modeTA = +25°CVCC = 5.0 V, At Stop mode, TA = +25°C

Other than C, AVCC, AVSS, AVRH, AVRL, VCC, VSS,

ICTS

Power supply current*

ICTSPLL6

⎯47mA

ICCL

⎯70140µA

ICCLS

⎯2050µA

ICCT

⎯1035µA

ICCH

⎯725µA

Input capacityCIN

⎯515pF

* : The power supply current is measured with an external clock.44

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MB90860E Series

4.AC Characteristics

(1) Clock Timing

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Parameter

Symbol

PinX0, X1

Clock frequency

fC

X0, X1

fCLtCYL

X0, X1

tCYLL

Input clock pulse widthInput clock rise and fall timeInternal operating clock frequency (machine clock)Internal operating clock cycle time (machine clock)

PWH, PWLPWHL, PWLLtCR, tCFfCPfCPLtCPtCPL

X0A, X1A

X0X0AX0⎯⎯⎯⎯

41.6710105⎯1.5⎯41.6720

⎯30.5⎯15.2⎯⎯8.192⎯122.1

333—⎯⎯52450666⎯

nsµsnsµsnsMHzkHznsµs

Duty ratio is about 30% to 70%.

When using external clockWhen using main clockWhen using sub clockWhen using main clockWhen using sub clock

X0A, X1AX0, X1

Clock cycle time

3—62.5

⎯32.768⎯

24100333

MHzkHzns

When using an oscillation circuit

When using an external clock

Value

Min3

Typ⎯

Max16

UnitMHz

Remarks

When using an oscillation circuit

When using an external clock*

* : When selecting the PLL clock, the range of clock frequency is limited. Use this product within range as

mentioned in “Relation among external clock frequency and machine clock frequency”.

tCYLX0PWHtCFPWLtCR0.8 VCC0.2 VCCtCYLLX0APWHLtCFPWLLtCR0.8 VCC0.2 VCCClock Timing45

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MB90860E Series

• Guaranteed PLL operation rangeGuaranteed operation range5..03.5Guaranteed PLL operation range Guaranteed A/D Converteroperation range Power supply voltageVCC (V)1.Machine clock fCP (MHz)24Guaranteed operation range of MB90860E seriesGuaranteed oscillation frequency range × 6 × 4 × 3 ×2× 124Internal clockfCP (MHz)161284.01.5348121624External clock fC (MHz) * × 1/2(PLL off)* : When using crystal oscillator or ceramic oscillator, the maximum oscillation clock frequency is 16 MHz46

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MB90860E Series

(2) Reset Standby Input

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)

Parameter

Symbol

Pin

ValueMin500

Reset input time

tRSTL

RSTOscillation time of oscillator*

+ 100 µs

100

Max⎯⎯⎯

Unitnsnsµs

Remarks

Under normal operationIn Stop mode, Sub Clock mode, Sub Sleep mode and Watch modeIn Time Timer mode

* : Oscillation time of oscillator is the time that the amplitude reaches 90%.

In the crystal oscillator, the oscillation time is between several ms and to tens of ms. In ceramic oscillators, the oscillation time is between hundreds of µs to several ms. With an external clock, the oscillation time is 0 ms.

Under normal operation:tRSTLRST0.2 VCC0.2 VCCIn Stop mode, Sub Clock mode, Sub Sleep mode, Watch mode, Power-on: tRSTLRST0.2 VCC90% ofamplitude0.2 VCCX0Internal operationclockOscillation timeof oscillator100 µsOscillation stabilization waiting timeInstruction executionInternal reset47

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MB90860E Series

(3) Power On Reset

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)

ParameterPower on rise timePower off time

SymboltRtOFF

PinVCCVCC

Condition

ValueMin0.051

Max30⎯

Unitmsms

Due to repetitive operation

Remarks

tR2.7 V0.2 V0.2 VtOFFIf you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you startup smoothly by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you can operate 0.2 VVCCVCC3 VVSSHolds RAM dataWe recommend a rise of 50 mV/ms maximum. (4) Clock Output Timing

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

ParameterCycle timeCLK ↑ → CLK ↓

SymboltCYCtCHCL

PinCLKCLK

Condition

⎯⎯

ValueMin62.1.762013

Max⎯⎯⎯⎯

Unitnsnsnsns

Remarks

fCP = 16 MHzfCP = 24 MHzfCP = 16 MHzfCP = 24 MHz

tCYCtCHCLCLK2.4 V0.8 V2.4 V48

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MB90860E Series

(5) Bus Timing (Read)

Parameter

ALE pulse width

Valid address → ALE ↓ timeALE ↓ → Address valid timeValid address → RD ↓ timeValid address → Valid data inputRD pulse widthRD ↓ → Valid data inputRD ↑ → Data hold timeRD ↓ → ALE ↑ timeRD ↑ → Address valid timeValid address → CLK ↑ timeRD ↓ → CLK ↑ timeALE ↓ → RD ↓ time

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

ValueSym-PinConditionUnit

bolMinMaxtLHLLtAVLLtLLAXtAVRLtAVDVtRLRHtRLDVtRHLHtRHAXtAVCHtRLCHtLLRL

ALE

ALE, A23 to A16,

AD15 to AD00ALE, AD15 to AD00A23 to A16,

AD15 to AD00, RDA23 to A16, AD15 to AD00RDRD, AD15 to AD00RD, ALERD, A23 to A16A23 to A16,

AD15 to AD00, CLKRD, CLKALE, RDtAVCH

CLK

2.4 V

tRLCH2.4 V

tCP/2 − 10tCP/2 − 20tCP/2 − 15tCP − 15⎯

3 tCP/2 − 20

⎯0tCP/2 − 15tCP/2 − 10tCP/2 − 16tCP/2 − 15tCP/2 − 15

⎯⎯⎯⎯5 tCP/2 − 60

⎯3 tCP/2 − 50

⎯⎯⎯⎯⎯⎯

nsnsnsnsnsnsnsnsnsnsnsnsns

tRHDXRD, AD15 to AD00tAVLL

ALE

2.4 VtLHLL

tAVRL

RDtLLAX2.4 V0.8 V

tRLRH

2.4 V

0.8 V

tLLRL

tRHLH2.4 V

tRHAX

A23 to A16

2.4 V0.8 V

tRLDV

tAVDV

AD15 to AD00

2.4 V0.8 V

Address

2.4 V0.8 V

VIHVIL

Read data

2.4 V0.8 VtRHDX

VIHVIL

49

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MB90860E Series

(6) Bus Timing (Write)

Parameter

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

SymbolPinConditionUnit

MinMaxtAVWLtWLWHtDVWHtWHDXtWHAXtWHLHtWLCH

A23 to A16,

AD15 to AD00, WRWRAD15 to AD00, WRAD15 to AD00, WRA23 to A16, WRWR, ALEWR, CLK⎯

tCP−153 tCP/2 − 203 tCP/2 − 20

15tCP/2 − 10tCP/2 − 15tCP/2 − 15

⎯⎯⎯⎯⎯⎯⎯

nsnsnsnsnsnsns

Valid address → WR ↓ timeWR pulse widthValid data output → WR ↑ timeWR ↑ → Data hold timeWR ↑ → Address valid timeWR ↑ → ALE ↑ timeWR ↓ → CLK ↑ time

tWLCH

CLK

2.4 V

tWHLH

ALE

2.4 V

tAVWL

WR (WRL, WRH)tWLWH

2.4 V

0.8 V

tWHAX

A23 to A16

2.4 V0.8 V

tDVWH

AD15 to AD00

2.4 V0.8 V

Address

2.4 V0.8 V

Write data

2.4 V0.8 VtWHDX

2.4 V0.8 V

50

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MB90860E Series

(7) Ready Input Timing

Parameter

RDY setup timeRDY hold time

Sym-boltRYHStRYHH

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Rated ValueTest

PinUnitsRemarks

ConditionMinMaxRDYRDY

45

320

⎯⎯⎯

nsnsns

fCP = 16 MHzfCP = 24 MHz

Note : If the RDY setup time is insufficient, use the auto-ready function.

CLK

2.4 V

ALE

RD/WR

tRYHS

RDY

When WAIT is not used.

VIH

tRYHHVIH

RDY

When WAIT is used.

VIL

51

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MB90860E Series

(8) Hold Timing

Parameter

Pin floating → HAK ↓ timeHAK ↑ time → Pin valid time

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

SymbolPinConditionUnits

MinMaxtXHALtHAHV

HAKHAK⎯

30tCP

tCP2 tCP

nsns

Note : There is more than 1 cycle from when HRQ reads in until the HAK is changed.HAK

tXHAL

Each pin

2.4 V0.8 V

2.4 V

0.8 V

tHAHV

High-Z

2.4 V0.8 V

52

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MB90860E Series

(9) UART0/1/2/3/4

Parameter

Serial clock cycle timeSCK ↓ → SOT delay timeValid SIN → SCK ↑

SCK ↑ → Valid SIN hold timeSerial clock “H” pulse widthSerial clock “L” pulse widthSCK ↓ → SOT delay timeValid SIN → SCK ↑

SCK ↑ → Valid SIN hold time

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

SymbolPinConditionUnit

MinMaxtSCYCtSLOVtIVSHtSHIXtSHSLtSLSHtSLOVtIVSHtSHIX

SCK0 to SCK4

SCK0 to SCK4,

SOT0 to SOT4Internal clock

operation output pins

SCK0 to SCK4, are SIN0 to SIN4CL = 80 pF + 1 TTL.SCK0 to SCK4, SIN0 to SIN4SCK0 to SCK4SCK0 to SCK4

SCK0 to SCK4, External clock

SOT0 to SOT4operation output pins

are

SCK0 to SCK4,

CL = 80 pF + 1 TTL.

SIN0 to SIN4SCK0 to SCK4, SIN0 to SIN4

8 tCP−80100604 tCP4 tCP⎯6060

⎯+80⎯⎯⎯⎯150⎯⎯

nsnsnsnsnsnsnsnsns

Notes : •AC characteristic in CLK synchronized mode.

•CL is load capacity value of pins when testing.

tSCYC

SCK

2.4 V

0.8 VtSLOV

SOT

2.4 V0.8 V

tIVSH

SIN

VIHVIL

tSHIX

VIHVIL0.8 V

Internal Shift Clock Mode

53

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MB90860E Series

tSLSH

SCK

VIH

VILtSLOV

SOT

2.4 V0.8 V

tIVSH

SIN

VIHVIL

VIL

tSHSL

VIH

tSHIX

VIHVIL

External Shift Clock Mode

(10) Trigger Input Timing

Parameter

SymboltTRGHtTRGL

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V)

Value

PinConditionUnit

MinMaxINT0 to INT15,

INT0R to INT15R,

ADTG

5 tCP

ns

Input pulse width

VIHVIH

VIL

tTRGH

tTRGL

VIL

INT0 to INT15, INT0R to INT15R, ADTG

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MB90860E Series

(11) Timer Related Resource Input Timing

(TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

ParameterSymbolPinConditionUnit

MinMaxInput pulse width

tTIWHtTIWL

TIN0 to TIN3,

IN0 to IN7

4 tCP

ns

VIHVIH

VIL

tTIWH

tTIWL

VIL

TIN0 to TIN3,IN0 to IN7

(12) Timer Related Resource Output Timing

(TA = –40°C to +105°C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V)

Value

ParameterSymbolPinConditionUnit

MinMaxCLK ↑ → TOUT change time

tTO

TOT0 to TOT3,

PPG0 to PPGF

30

ns

CLK

2.4 V

TOT0 to TOT3,PPG0 to PPGF

tTO

2.4 V0.8 V

55

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MB90860E Series

(13) I2C Timing

Parameter

SCL clock frequency

Hold time (repeated) START conditionSDA ↓ → SCL ↓

“L” width of the SCL clock“H” width of the SCL clock

Set-up time for a repeated START conditionSCL ↑ → SDA ↓Data hold timeSCL ↓ → SDA ↓ ↑Data set-up timeSDA ↓ ↑ → SCL ↑

Set-up time for STOP conditionSCL ↑ → SDA ↑

Bus free time between a STOP and START condition

SymbolfSCLtHDSTAtLOWtHIGHtSUSTAtHDDATtSUDATtSUSTOtBUS

R = 1.7 kΩ,C = 50 pF*2

(TA = –40°C to +105°C, VCC = 5.0 V ± 10%, VSS = 0.0 V)

Standard-modeFast-mode*1

ConditionUnit

MinMaxMinMax

04.04.74.04.702504.04.7

100⎯⎯⎯⎯3.45*3⎯⎯⎯

00.61.30.60.601000.61.3

400⎯⎯⎯⎯0.9*4⎯⎯⎯

kHzµsµsµsµsµsnsµsµs

*1 : For use at over 100 kHz, set the machine clock to at least 6 MHz.*2 : R,C : Pull-up resistor and load capacitor of the SCL and SDA lines.

*3 : The maximum tHDDAT have only to be met if the device does not stretch the “L” width (tLOW) of the SCL signal.*4 : A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement

tSUDAT ≥ 250 ns must then be met.

SDAtBUStLOWSCLtSUDATtHDSTAtHDSTAtHDDATtHIGHtSUSTAtSUSTO56

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MB90860E Series

5.A/D Converter

(TA = −40 °C to +105 °C, 3.0 V ≤ AVRH − AVRL, VCC = AVCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)ParameterResolutionTotal errorNonlinearity errorDifferential

nonlinearity errorZero reading voltage

Full scale reading voltageCompare timeSampling timeAnalog port input currentAnalog input voltage rangeReference voltage rangePower supply currentReference voltage currentOffset between input channels

Symbol⎯⎯⎯⎯VOTVFST⎯⎯IAINVAIN⎯⎯IAIAHIRIRH⎯

Pin⎯⎯⎯⎯

Value

Min⎯⎯⎯⎯

Typ⎯⎯⎯⎯

Max10±3.0±2.5±1.9

UnitbitLSBLSBLSB

Remarks

AN0 to AN23AVRL − 1.5AVRL + 0.5AVRL + 2.5LSBAN0 to AN23AVRH − 3.5AVRH − 1.5AVRH + 0.5LSB

⎯⎯AN0 to AN23AN0 to AN23

AVRHAVRLAVCCAVCCAVRHAVRHAN0 to AN23

1.02.00.51.2−0.3AVRLAVRL + 2.7

0⎯⎯⎯⎯⎯

⎯⎯⎯⎯⎯⎯3.5⎯600⎯⎯

16500

µsµsµAVVVmAµAµAµALSB

**

4.5 V ≤ AVCC ≤ 5.5 V4.0 V ≤ AVCC < 4.5 V4.5 V ≤ AVCC ≤ 5.5 V4.0 V ≤ AVCC < 4.5 V

+0.3AVRHAVCCAVRH − 2.7

7.55900

* : IF A/D convertor is not operating, a current when CPU is stopped is applicable (VCC = AVCC = AVRH = 5.0 V) .Note : The accuracy gets worse as AVRH − AVRL becomes smaller.

57

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MB90860E Series

6.Definition of A/D Converter Terms

ResolutionNon linearity errorDifferential linearity errorTotal errorZero reading voltageFull scale

reading voltage

: Analog variation that is recognized by an A/D converter.

: Deviation between a line across zero-transition line ( “00 0000 0000” ← → “00 0000 0001” ) and full-scale transition line ( “11 1111 1110” ← → “11 1111 1111” ) and actual conversion characteristics.

: Deviation of input voltage, which is required for changing output code by 1 LSB, from an ideal value.

: Difference between an actual value and an ideal value. A total error includes zero transition error, full-scale transition error, and linear error.

: Input voltage which results in the minimum conversion value. : Input voltage which results in the maximum conversion value.

Total error3FFH3FEH3FDH Digital output{1 LSB × (N − 1) + 0.5 LSB}Actual conversioncharacteristics1.5 LSB004H003H002H001H0.5 LSBAVRLAnalog inputVNT(Actually-measured value)Actual conversioncharacteristicsIdeal characteristicsAVRHTotal error of digital output “N” = VNT − {1 LSB × (N − 1) + 0.5 LSB}1 LSBAVRH − AVRL1 LSB (Ideal value) = [V]1024VOT (Ideal value) = AVRL + 0.5 LSB [V]VFST (Ideal value) = AVRH − 1.5 LSB [V][LSB]VNT : A voltage at which digital output transitions from (N − 1) to N.(Continued)58

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MB90860E Series

(Continued)Non linearity error3FFH3FEH3FDHDigital outputActual conversioncharacteristics{1 LSB × (N − 1) + VOT }N + 1HVFST (actualmeasurement value)VNT (actualmeasurement value)Actual conversioncharacteristicsIdeal characteristics001HVOT (actual measurement value)AVRLAnalog inputAVRHAVRLActual conversioncharacteristicsDifferential linearity errorIdeal characteristicsDigital outputNH004H003H002HN − 1HV (N + 1) T(actual measurementvalue)VNT(actual measurement value)Actual conversioncharacteristicsAVRHN − 2HAnalog inputNon linearity error of digital output N =Differential linearity error of digital output N =1 LSB =VNT − {1 LSB × (N − 1) + VOT}1 LSBV (N+1) T − VNT1 LSBVFST − VOT1022−1 LSB [LSB][V][LSB]VOT : Voltage at which digital output transits from “000H” to “001H.”VFST : Voltage at which digital output transits from “3FEH” to “3FFH.”59

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MB90860E Series

7.Notes on A/D Converter Section

Use the device with external circuits of the following output impedance for analog inputs :

Recommended output impedance of external circuits are : Approx. 1.5 kΩ or lower (4.0 V ≤ AVCC ≤ 5.5 V,

sampling period ≤ 0.5 µs) If an external capacitor is used, in consideration of the effect by tap capacitance caused by external capacitorsand on-chip capacitors, capacitance of the external one is recommended to be several thousand times as highas internal capacitor.

If output impedance of an external circuit is too high, a sampling period for an analog voltage may be insufficient. •Analog input circuit modelAnalog inputRComparatorC4.5 V ≤ AVCC ≤ 5.5 V : R := 2.52 kΩ, C := 10.7 pF4.0 V ≤ AVCC < 4.5 V : R := 13.6 kΩ, C := 10.7 pFNote : Use the values in the figure only as a guideline.8.Flash Memory Program/Erase Characteristics

Parameter

Sector erase timeChip erase timeWord (16-bit width)

programming timePrograms/Erase cycleFlash Data Retention Time

⎯AverageTA = +85 °CTA = +25 °CVCC = 5.0 VConditions

Value

Min⎯⎯⎯1000020

Typ1916⎯⎯

Max15⎯3600⎯⎯

UnitssµscycleYear

*

Remarks

Excludes programming prior to erasureExcludes programming prior to erasure

Except for the over head time of the system

* : This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at +85 °C) .

60

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MB90860E Series

■EXAMPLE CHARACTERISTICS

•MB90F867E, MB90F867ESICC − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency706050f = 24 MHzf = 20 MHzf = 16 MHzf = 12 MHzf = 10 MHzf = 8 MHzf = 4 MHzf = 2 MHz2.53..55.56.51009080706050403020100ICCL − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICC (mA)403020100ICCL (A)f = 8 kHz2.53..55.56.5VCC (V)VCC (V)ICCS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency3530f = 24 MHzf = 20 MHzf = 16 MHzf = 12 MHzf = 10 MHzf = 8 MHzf = 4 MHzf = 2 MHz2.53..55.56.5504035302520151050ICCLS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICCS (mA)20151050ICCLS (A)25f = 8 kHz2.53..55.56.5VCC (V)VCC (V)ICTS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency4003503002502001501005002.53..55.56.5201816141210820ICCT − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICCT (A)ICTS (A)f = 2 MHzf = 8 kHz2.53..55.56.5VCC (V)VCC (V)ICTSPLL6 − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency10987632101098763210ICCH − VCCTA = +25 °C, at stopICTSPLL6 (mA)f = 24 MHz2.53..55.56.5ICCH (A)VCC (V)2.53..55.56.5VCC (V)61

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MB90860E Series

•MB90867E, MB90867ESICC − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency706050f = 24 MHz1009080706050403020100ICCL − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICC (mA)4030201002.53..55.5ICCL (µA)f = 20 MHzf = 16 MHzf = 12 MHzf = 10 MHzf = 8 MHzf = 4 MHzf = 2 MHz6.5f = 8 kHz2.53..5VCC (V)VCC (V)5.56.5ICCS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency3530f = 24 MHzf = 20 MHzf = 12 MHzf = 10 MHzf = 8 MHzf = 4 MHzf = 2 MHz2.53..55.56.5f = 16 MHz504035302520151050ICCLS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICCS (mA)2520151050ICCLS (µA)f = 8 kHz2.53..55.56.5VCC (V)VCC (V)ICTS − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency400350300201816141210820ICCT − VCCTA = +25 °C, at external clock operatingf = Internal operation frequencyICTS (µA)2001501005002.53..55.56.5ICCT (µA)250f = 2 MHzf = 8 kHz2.53..55.56.5VCC (V)VCC (V)ICTSPLL6 − VCCTA = +25 °C, at external clock operatingf = Internal operation frequency10987632101098763210ICCH − VCCTA = +25 °C, at stopICTSPLL6 (mA)f = 24 MHz2.53..55.56.5ICCH (µA)VCC (V)2.53..55.56.5VCC (V)62

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MB90860E Series

•I/O characteristics (VCC−VOH) − IOHTA = +25 °C, VCC = 4.5 V80070010009008007006005004003002001000VOL − IOLTA = +25 °C, VCC = 4.5 VVCCVOH (mV)60050040030020010000123456710VOL (mV)0123456710IOH (mA)IOL (mA)Automotive VIN − VCCTA = +25 °C5.04..03.53.02.52.01.51.00.50.05.04..03.53.02.52.01.51.00.50.0CMOS VIN − VCCUART-SIN pin, other than I2C pinTA = +25 °CVIHAVILAVIN (V)VIHSVIN (V)VILS2.53.03..04.55.05.56.06.57.02.53.03..04.55.05.56.06.57.0VCC (V)VCC (V)TTL VIN − VCCTA = +25 °C2.52.32.01.81.51.31.00.80.50.30.05.04..03.53.02.52.01.51.00.50.0CMOS VIN − VCCUART-SIN pin, I2C pinTA = +25 °CVIHSVIN (V)VIHTVILTVIN (V)VILS2.53.03..04.55.05.56.06.57.02.53.03..04.55.05.56.06.57.0VCC (V)VCC (V)63

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MB90860E Series

■ORDERING INFORMATION

Part number

MB90F867EPFMB90F867ESPFMB90F867EPFVMB90F867ESPFVMB90867EPFMB90867ESPFMB90867EPFVMB90867ESPFVMB90V340E-101MB90V340E-102

Package100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 299-pin Ceramic PGA (PGA-299C-A01)

Remarks

Flash memory product

MASK ROM product

Evaluation product

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MB90860E Series

■PACKAGE DIMENSIONS

100-pin plastic QFPLead pitchPackage width ×package lengthLead shapeSealing methodMounting heightCode(Reference)0.65 mm14.00× 20.00 mmGullwingPlastic mold3.35 mm MAXP-QFP100-14×20-0.65(FPT-100P-M06)100-pin plastic QFP(FPT-100P-M06)23.90±0.40(.941±.016)*20.00±0.20(.787±.008)8051Note 1)* : These dimensions do not include resin protrusion.Note 2)Pins width and pins thickness include plating thickness.Note 3)Pins width do not include tie bar cutting remainder.81500.10(.004)17.90±0.40(.705±.016)*14.00±0.20(.551±.008)INDEXDetails of \"A\" part100311300.25(.010)+0.353.00–0.20+.014.118–.008(Mounting height)0~8˚0.17±0.06(.007±.002)0.65(.026)\"A\"0.32±0.05(.013±.002)0.13(.005)M0.80±0.20(.031±.008)0.88±0.15(.035±.006)0.25±0.20(.010±.008)(Stand off)C2002 FUJITSU LIMITED F100008S-c-5-5Dimensions in mm (inches).Note: The values in parentheses are reference values.Please confirm the latest Package dimension by following URL.http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html

(Continued)

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MB90860E Series

(Continued)

100-pin plastic LQFPLead pitchPackage width ×package lengthLead shapeSealing methodMounting heightWeight0.50 mm14.0× 14.0 mmGullwingPlastic mold1.70 mm MAX0.65gP-LFQFP100-14×14-0.50(FPT-100P-M05)Code(Reference)100-pin plastic LQFP(FPT-100P-M05)16.00±0.20(.630±.008)SQ*14.00±0.10(.551±.004)SQ7551Note 1)* : These dimensions do not include resin protrusion.Note 2)Pins width and pins thickness include plating thickness.Note 3)Pins width do not include tie bar cutting remainder.76500.08(.003)Details of \"A\" partINDEX1.50–0.10.059–.004(Mounting height)26+0.20+.0081000.10±0.10(.004±.004)(Stand off)0.25(.010)0˚~8˚\"A\"0.50±0.20(.020±.008)0.60±0.15(.024±.006)1250.50(.020)0.20±0.05(.008±.002)0.08(.003)M0.145±0.055(.0057±.0022)C2003 FUJITSU LIMITED F100007S-c-4-6Dimensions in mm (inches).Note: The values in parentheses are reference values.Please confirm the latest Package dimension by following URL.http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html

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元器件交易网www.cecb2b.com

MB90860E Series

The information for microcontroller supports is shown in the following homepage.

http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html

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