专利名称:Columnar floorplan发明人:Steven P. Young申请号:US11581914申请日:20061017公开号:US07557610B2公开日:20090707
专利附图:
摘要:An FPGA is laid out as a plurality of repeatable tiles, wherein the tiles aredisposed in columns that extend from one side of the die to another side of the die, andwherein each column includes tiles primarily of one type. Because substantially all diearea of a column is due to tiles of a single type, the width of the tiles of each column can
be optimized and is largely independent of the size of the other types of tiles on the die.The confines of each type of tile can therefore be set to match the size of the circuitry ofthe tile. Rather than providing a ring of input/output blocks (IOBs) around the dieperiphery, IOB tiles are disposed in columns only. Where more than two columns worthof IOBs is required, more than two columns of IOB tiles can be provided.
申请人:Steven P. Young
地址:Boulder CO US
国籍:US
代理人:Lester Wallace,Kim Kanzaki,John J. King
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