PDM41028LA10TSOATR资料

PDM410281 Megabit Static RAM256K x 4-Bit1FeaturesDescriptionnHigh speed access timesThe PDM41028 is a high-performance CMOS staticCom’l: 10, 12 and 15 nsRAM organized as 262,144 x 4 bits. Writing to thisInd’l: 12 and 15 nsdevice is accomplished when the write enable (WE)2and the chip enable (CE) inputs are both LOW.nLow power operation (typical)Reading is accomplished when WE remains HIGH- PDM41028SAand CE and OE are both LOW.Active: 400 mW3Standby: 150 mW The PDM41028 operates from a single +5V power- PDM41028LAsupply and all the inputs and outputs are fully TTL-Active: 350 mW compatible. The PDM41028 comes in two versions,Standby: 100 mW the standard power version PDM41028SA and a low4power version the PDM41028LA. The two versionsare functionally the same and only differ in theirnSingle +5V (±10%) power supplypower consumption.nTTL-compatible inputs and outputsnPackagesThe PDM41028 is available in a 28-pin 300-mil SOJ,5Plastic SOJ (300 mil) - TSO and a 28-pin 400-mil SOJ for surface mountPlastic SOJ (400 mil) - SOapplications.6Functional Block Diagram7A󰀀•󰀀0󰀀Decoder•󰀀•󰀀MemoryAddresses•󰀀•󰀀•󰀀•󰀀8•󰀀•󰀀Matrix•󰀀A󰀀•󰀀17I/O󰀀•••••0󰀀9Input󰀀Column I/OI/O󰀀1󰀀Data󰀀ControlI/O󰀀2󰀀10I/O311CEWE12OERev. 2.2 - 4/29/98

1

元器件交易网www.cecb2b.com

PDM41028

Pin ConfigurationSOJA7󰀀A8󰀀A9󰀀A10󰀀A11󰀀A12󰀀A13󰀀A14󰀀A15󰀀A16󰀀A17󰀀CE󰀀OE󰀀Vss123456710111213142827262524232221201918171615Vcc󰀀A6󰀀A5󰀀A4󰀀A3󰀀A2󰀀A1󰀀A0󰀀NC󰀀I/O3󰀀I/O2󰀀I/O1󰀀I/O0󰀀WEPin DescriptionNameA17-A0I/O3-I/O0OEWECENCVCCVSSDescriptionAddress InputsData Inputs/OutputsOutput Enable InputWrite Enable InputChip Enable InputNo ConnectPower (+5V)GroundTruth Table(1)OEXLXHWEXHLHCEHLLLI/OHi-ZDOUTDINHi-ZMODEStandbyReadWriteOutput DisableNOTE: 1. H = VIH, L = VIL, X = DON’T CAREAbsolute Maximum Ratings (1)

SymbolVTERMTBIASTSTGPTIOUTTj

Rating

Terminal Voltage with Respect to VSSTemperature Under BiasStorage TemperaturePower DissipationDC Output Current

Maximum Junction Temperature (2)

Com’l.–0.5 to +7.0–55 to +125–55 to +125

1.050125

Ind.–0.5 to +7.0–65 to +135–65 to +150

1.050145

UnitV°C°CWmA°C

NOTE:1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2. Appropriate thermal calculations should be performed in all cases and specifically for

those where the chosen package has a large thermal resistance (e.g., TSOP). The cal-culation should be of the form: Tj = Ta + P * θja where Ta is the ambient temperature, P is average operating power and θja the thermal resistance of the package. For this product, use the following θja values:

SOJ: 76o C/WTSOP: 100o C/W

2Rev. 2.2 - 4/29/98

元器件交易网www.cecb2b.com

PDM41028

Recommended DC Operating ConditionsSymbolParameterMin.Typ.Max.UnitVCCSupply Voltage4.55.05.5V1VSSSupply Voltage000VIndustrialAmbient Temperature–402585°CCommercialAmbient Temperature02570°C23DC Electrical Characteristics (VCC = 5.0V ± 10%)PDM41028SAPDM41028LAUnitSymbolParameterTest ConditionsMin.Max.Min.Max.4ILIInput Leakage Current VCC = MAX., VIN = VSS to VCCCom’l/–55–55µAInd.ILOOutput Leakage CurrentVCC= MAX., Com’l/–55–55µACE = VIH, VOUT = VSS to VCCInd.5VILInput Low Voltage–0.5(1)0.8–0.5(1)0.8VVIHInput High Voltage2.26.02.26.0VVOLOutput Low VoltageIOL = 8 mA, VCC = Min.—0.4—0.4VIOL = 10 mA, VCC = Min.—0.5—0.5V6VOHOutput High VoltageIOH = –4 mA, VCC = Min.2.4—2.4—VNOTE:1.VIL(min) = –3.0V for pulse width less than 20 ns7Power Supply Characteristics-10-12-15SymbolParameterPowerCom’l.Com’lInd.Com’lInd.Unit8ICCOperating CurrentSA250230240185195mACE = VIL, f = fMAX = 1/tRCLA230210220165175mAVCC = Max.9IOUT = 0 mAISBStandby CurrentSA8070705555mACE = VIHf = fMAX = 1/tRCLA7565655050mA10VCC = Max.ISB1Full Standby CurrentSA2015251015mA CE ≥ VHCf = 0 LA101010510mA11VCC = Max., VIN ≥ VCC – 0.2V or ≤ 0.2VSHADED AREA = PRELIMINARY DATANOTES: All values are maximum guaranteed values.V12LC ≤ 0.2V, VHC ≥ VCC – 0.2VRev. 2.2 - 4/29/98

3

元器件交易网www.cecb2b.com

PDM41028

Capacitance(1) (TA = +25°C, f = 1.0 MHz)

SymbolCINCOUT

ParameterInput CapacitanceOutput Capacitance

Max.88

UnitpFpF

NOTE:1.This parameter is determined by device characterization but is not production tested.

AC Test Conditions

Input pulse levelsInput rise and fall timesInput timing reference levelsOutput reference levelsOutput load

VSS to 3.0V

3 ns1.5V1.5V

See Figures 1 and 2

+5V480ΩDOUT255Ω30 pF+5V480ΩDOUT255Ω5 pfFigure 1. Output Load Equivalent

Figure 2. Output Load Equivalent(for tLZCE, tHZCE, tLZWE, tHZWE, tLZOE,

tHZOE)

Delta tAA - ns32100Typical Delta tAA vs Capacitive LoadingFigure 4. 306090120Additional Lumped Capacitive Loading (pF)4Rev. 2.2 - 4/29/98

元器件交易网www.cecb2b.com

PDM41028

Read Cycle No. 1(4, 5)

tRCADDR󰀀1tAAtOHDOUTPREVIOUS DATA VALIDDATA VALID2Read Cycle No. 2(2, 4, 6)

3tRCADDR󰀀tAA4tACECE󰀀tLZCEtHZCEOE󰀀5tLZOEtHZOEDOUTDATA VALID6tAOE7AC Electrical Characteristics

Description-10(7)-12(7)8-15READ CycleSymMin.Max.Min.Max.Min.Max.UnitsREAD cycle timetRC101215ns9Address access timetAA101215nsChip enable access timetACE101215nsOutput hold from address changetOH333nsChip enable to output in low Z(1,3)tLZCE555ns10Chip disable to output in high Z(1,2,3)tHZCE667nsChip enable to power up time(3)tPU000nsChip disable to power down time(3)tPD101215ns11Output enable access timetAOE666nsOutput enable to output in low Z (1,3)tLZOE000nsOutput disable to output in high Z(1,3)tHZOE666ns12SHADED AREA = PRELIMINARY DATA

Notes referenced are after Data Retention Table.

Rev. 2.2 - 4/29/98

5

元器件交易网www.cecb2b.com

PDM41028

Write Cycle No. 1 (Write Enable Controlled)

tWCADDRtAWCEtAHtCWtWP2WEtASDINtDSDATA VALIDtDHtHZWEDOUTHIGH-ZHIGH-ZtLZWEWrite Cycle No. 2 (Write Enable Controlled)

tWCADDR󰀀tAWCE󰀀tAHtCWtASWE󰀀DINtWP1tDSDATA VALIDtDHDOUTHIGH-ZNOTE: Output Enable (OE) is inactive (high)Write Cycle No. 3 (Chip Enable Controlled)

tWCADDRtAWtCWCEtASWEtWP1tDStAHtDHDINDATA VALIDDOUTHIGH-Z6Rev. 2.2 - 4/29/98

元器件交易网www.cecb2b.com

PDM41028

AC Electrical Characteristics Description-10(7)-12(7)-15WRITE CycleSymMin.Max.Min.Max.Min.Max.Units1WRITE Cycle timetWC101215nsChip enable active timetCW101011nsAddress Valid to end of writetAW101011ns2Address setup timetAS000nsAddress hold from end of writetAH000nsWrite pulse widthtWP191011ns3Write pulse widthtWP2101112nsData setup timetDS777nsData hold timetDH000ns4Write disable to output in low Z(1,3)tLZWE000nsWrite enable to output in high Z(1,3)tHZWE777nsSHADED AREA = PRELIMINARY DATANotes referenced are after Data Retention Table5Low VCC Data Retention Waveform6Data Retention ModeVCC4.5VV4.5VDRtCDRtR7V󰀀CEIHVDRVIL8DON'T CAREData Retention Electrical Characteristics (LA Version Only)9SymbolParameterTest ConditionsMin.Typ.Max.UnitVDRVCC for Retention Data2——VICCDRData Retention CurrentCE ≥ VCC – 0.2V VCC = 2V——500µAVIN ≥ VCC – 0.2V10or ≤ 0.2VVCC = 3V——750µAtCDRChip Deselect to Data Retention Time0——nstR(3)Operation Recovery TimetRC——ns11NOTES: (For three previous Electrical Characteristics tables)1.The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage.2.At any given temperature and voltage condition, tHZCE is less than tLZCE.3.This parameter is sampled.4.WE is high for a READ cycle.125.The device is continuously selected. Chip Enable is held in its active state.6.The address is valid prior to or coincident with the latest occuring Chip Enable.7.Vcc = 5V ± 5%.Rev. 2.2 - 4/29/98

7

元器件交易网www.cecb2b.com

PDM41028

Ordering Information

XXXXXXDevice TypePowerXXSpeedXXXPackageTypeProcessTemp. RangePreferredShippingContainerBlank󰀀TubesTR 󰀀Tape & ReelTY 󰀀TrayBlankCommercial (0° to +70°C)IIndustrial (–40°C to +85°C)A󰀀Automotive (–40°C to +105°C)TSO󰀀28-pin 300-mil Plastic SOJSO 󰀀28-pin 400-mil Plastic SOJ 101215Commercial Only(Use 15ns for slower designs.)SA 󰀀LA 󰀀Standard PowerLow PowerPDM41028 - (256Kx4) Static RAMFaster Memories for a Faster World ™

8

Rev. 2.2 - 4/29/98