Phase-locked loop with digitally controlled, frequ

专利名称：Phase-locked loop with digitally controlled,

frequency-multiplying oscilator

发明人：Wilson, William Burdett申请号：EP00309052.9申请日：20001016公开号：EP1104111B1公开日：20040211

摘要：A phase-locked loop (PLL) having a digitally controlled oscillator (DCO), wherethe DCO receives a digital control signal generated by the PLL and an externallygenerated oscillator clock signal and generates an output signal having a frequencygreater than that of the oscillator clock signal. In one embodiment, the DCO is an analogPLL, such as a fractional-N frequency synthesizer, that receives a two-part digital controlsignal corresponding to the integer and fractional portions of a desired multiplier. Thefeedback path within the DCO has a dual-modulus divider that is controlled by a moduluscontroller to apply, over time, an effective divisor value that achieves the desired degreeof multiplication. PLLs of the present invention are especially applicable to low-bandwidth, low-noise applications, such as high-multiplication frequency synthesizers andclock filtering, that are integrated into digital ASICs.

申请人：LUCENT TECHNOLOGIES INC

地址：US

国籍：US

代理机构：Williams, David John

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